1.set output compare register 1B
In assembly language
ldi r16,high(4321);
sts OCR1BH,r16;
ldi r16,low(4321);
sts OCR1BL,r16;
In C
OCR1B=4321;
-
To toggle OC1A pin (what pin is this?) 8 times per second (i.e. 4Hz period)
#include <avr/io.h>
/*
-
main -- Main program
/
int main(void)
{
/ Set OC1A pin to be an output /
/ Pin OC1A is Port D, pin 5 */
DDRD = (1<<5);/* We want to count 1,000,000 clock cycles between each toggle of the pin.
** We choose to do this with a prescale of /64 and to count 15625 cycles,
** i.e. we count from 0 to 15624. /
/ Set output compare register value */
OCR1A = 15624;/* Set timer counter control registers A and B so that
-
- mode is - clear counter on compare match (WGM bits are 0100)
-
- output compare match action is to toggle pin OC1A (COM1A bits are 01)
-
- correct clock prescale value is chosen.
- TCCR1C can just stay as default value (0).
*/
TCCR1A = (0 << COM1A1) | (1 << COM1A0) // Toggle OC1A on compare match
| (0 << WGM11) | (0 << WGM10); // Least two significant WGM bits
TCCR1B = (0 << WGM13) | (1 << WGM12) // Two most significant WGM bits
| (0 << CS12) | (1 << CS11) | (1 <<CS10); // Divide clock by 64
/* Do nothing forever - the hardware takes care of everything */
while(1) {
;
}
} -
-
5.7 segment display connected to port A, with CC (digit select) connected to port D, pin 0
#include <avr/io.h>
uint8_t seven_seg[10] = { 63,6,91,79,102,109,125,7,127,111};
/* Display digit function. Arguments are the digit number (0 to 9)
* and the digit to display it on (0 = right, 1 = left). The function
* outputs the correct seven segment display value to port A and the
* correct digit select value to port D, pin 0.
* See Lecture 14 example code for some code to base this on.
*/
void display_digit(uint8_t number, uint8_t digit)
{
PORTD = digit;
PORTA = seven_seg[number]; // We assume digit is in range 0 to 9
}
/*
* main -- Main program
*/
int main(void)
{
uint8_t digit; /* 0 = right, 1 = left */
uint8_t value;
/* Set port A (all pins) to be outputs */
DDRA = 0xFF;
/* Set port D, pin 0 to be an output */
DDRD = 1;
/* Set up timer/counter 0 to count the number of rising
** edges on pin T0.
*/
TCCR0A = 0;
TCCR0B = (1<<CS02) | (1<<CS01) | (1<<CS00);
/* Set up timer/counter 1 so that it reaches an output compare
** match every 1 millisecond (1000 times per second) and then
** resets to 0.
** We divide the clock by 8 and count 1000 cycles (0 to 999)
*/
OCR1A = 999;
TCCR1A = (0 << COM1A1) | (1 << COM1A0) // Toggle OC1A on compare match
| (0 << WGM11) | (0 << WGM10); // Least two significant WGM bits
TCCR1B = (0 << WGM13) | (1 << WGM12) // Two most significant WGM bits
| (0 << CS12) | (1 << CS11) | (0 <<CS10); // Divide clock by 8
/* Repeatedly output the digits. We keep track of which
** digit. 0 = right (ones place), 1 = left (tens place)
*/
digit = 0;
while(1) {
/* Output the current digit */
if(digit == 0) {
/* Extract the ones place from the timer counter 0 value */
/* HINT: Consider the modulus (%) operator. */
value = TCNT0 % 10;
} else {
/* Extract the tens place from the timer counter 0 */
value = (TCNT0 / 10) % 10;
}
display_digit(value, digit);
/* Change the digit flag for next time. if 0 becomes 1, if 1 becomes 0. */
digit = 1 - digit;
/* Wait for timer 1 to reach output compare A value.
* We can monitor the OCF1A bit in the TIFR1 register. When
* it becomes 1, we know that the output compare value has
* been reached. We can write a 1 to this bit to clear it.
* See page 143-144 of datasheet for details.
*/
while ((TIFR1 & (1 << OCF1A)) == 0) {
; /* Do nothing - wait for the bit to be set */
}
/* Clear the output compare flag - by writing a 1 to it. */
TIFR1 &= (1 << OCF1A);
}
}