RISC-V知识点目录

分支预测

分支预测概述https://blog.csdn.net/zhangshangjie1/article/details/136947089?sharetype=blogdetail&sharerId=136947089&sharerefer=PC&sharesource=zhangshangjie1&spm=1011.2480.3001.8118 分支指令的方向预测https://blog.csdn.net/zhangshangjie1/article/details/135261303 分支预测的地址跳转https://blog.csdn.net/zhangshangjie1/article/details/139169767 分支预测失败的处理https://blog.csdn.net/zhangshangjie1/article/details/134964464 超标量处理器中的分支预测实现https://blog.csdn.net/zhangshangjie1/article/details/137681183 TAGE predictorhttps://blog.csdn.net/zhangshangjie1/article/details/140291542

TAGE-SC-L predictorhttps://blog.csdn.net/zhangshangjie1/article/details/142791925?spm=1001.2014.3001.5501

TAGE-SC分支预测器https://blog.csdn.net/zhangshangjie1/article/details/142824078?spm=1001.2014.3001.5502

指令集体系

指令集体系简读https://blog.csdn.net/zhangshangjie1/article/details/137681854 RISCV指令集体系简读之RV32Ihttps://blog.csdn.net/zhangshangjie1/article/details/137792240 RISCV指令集体系简读之RV32Mhttps://blog.csdn.net/zhangshangjie1/article/details/137794084
decode

超标量之指令解码_指令集解码https://blog.csdn.net/zhangshangjie1/article/details/138484616
rename

处理器的状态管理https://blog.csdn.net/zhangshangjie1/article/details/134942507 处理器中的几种hazardhttps://blog.csdn.net/zhangshangjie1/article/details/142755074

rename--统一的PRFhttps://blog.csdn.net/zhangshangjie1/article/details/134839027 rename--超标量处理器的实现https://blog.csdn.net/zhangshangjie1/article/details/134840126 rename--恢复流程https://blog.csdn.net/zhangshangjie1/article/details/134851171 rename--一些例子与问题https://blog.csdn.net/zhangshangjie1/article/details/134849671 Rename--CAM在checkpoint恢复上的流程与优势https://blog.csdn.net/zhangshangjie1/article/details/134850744
ISSUE

ISSUE的基本概念_cpu issuehttps://blog.csdn.net/zhangshangjie1/article/details/135022058 发射过程中的流水线https://blog.csdn.net/zhangshangjie1/article/details/135058018 issue queue的实现方式https://blog.csdn.net/zhangshangjie1/article/details/135022410 issue阶段的选择电路的实现https://blog.csdn.net/zhangshangjie1/article/details/135059098 超标量处理器的唤醒https://blog.csdn.net/zhangshangjie1/article/details/135062260 唤醒阶段的推测唤醒(1)https://blog.csdn.net/zhangshangjie1/article/details/135064162 唤醒阶段的推测唤醒(2)https://blog.csdn.net/zhangshangjie1/article/details/135080169 issue unithttps://blog.csdn.net/zhangshangjie1/article/details/134987790
Execution

execution unit的概念与实现----BRU_branch unithttps://blog.csdn.net/zhangshangjie1/article/details/134920891 execution unit的概念与实现----ALUhttps://blog.csdn.net/zhangshangjie1/article/details/134922342 execution unit的概念与实现----AGUhttps://blog.csdn.net/zhangshangjie1/article/details/134923028 LSU介绍https://blog.csdn.net/zhangshangjie1/article/details/134923571 处理器中store指令的处理https://blog.csdn.net/zhangshangjie1/article/details/134968473
Commit

ROB的结构与作用https://blog.csdn.net/zhangshangjie1/article/details/134934552 ROB&dispatch stagehttps://blog.csdn.net/zhangshangjie1/article/details/134957062 ROB端口需求https://blog.csdn.net/zhangshangjie1/article/details/134941707
Exception & Interrupt

处理器中异常的处理https://blog.csdn.net/zhangshangjie1/article/details/134965392 riscv中的异常简介https://blog.csdn.net/zhangshangjie1/article/details/135123640 Excp/Trap/Int的一些简单说明https://blog.csdn.net/zhangshangjie1/article/details/135413348 TRAP概念及流程简介https://blog.csdn.net/zhangshangjie1/article/details/135000648 处理器中断的处理https://blog.csdn.net/zhangshangjie1/article/details/134967330 Machine Interrupt Registershttps://blog.csdn.net/zhangshangjie1/article/details/135544363 Machine Trap Delegation Registershttps://blog.csdn.net/zhangshangjie1/article/details/135548720 Machine Mode下的Excp处理https://blog.csdn.net/zhangshangjie1/article/details/142764415
特权架构

RV32/64 特权架构https://blog.csdn.net/zhangshangjie1/article/details/134974656 risc-v system instructionhttps://blog.csdn.net/zhangshangjie1/article/details/135003940
VECTOR

RISC-V vector(1) --- vector的引入与register说明https://blog.csdn.net/zhangshangjie1/article/details/141459803
浮点运算

浮点数的加法运算https://blog.csdn.net/zhangshangjie1/article/details/137920540 浮点数的乘法处理https://blog.csdn.net/zhangshangjie1/article/details/138808445 浮点数的转换--IEEE 754https://blog.csdn.net/zhangshangjie1/article/details/135204585
MISC

经典5级流水线概述https://blog.csdn.net/zhangshangjie1/article/details/142759726 Mtime&Mtimecmphttps://blog.csdn.net/zhangshangjie1/article/details/135595319 处理器类型简介https://blog.csdn.net/zhangshangjie1/article/details/135214846 RISCV中的寄存器操作https://blog.csdn.net/zhangshangjie1/article/details/134996405