太速科技-365-基于XC7Z045+AD9361的双收双发无线电射频板卡

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| ### 基于XC7Z045+AD9361的双收双发无线电射频板卡 |
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| 一、板卡概述 基于XC7Z045+AD9361的双收双发无线电射频板卡是基于Xilinx ZYNQ FPGA和ADI的无线收发芯片AD9361开发的专用功能板卡,用于4G小基站,无线图传,数据收发等领域。 二、板卡原理及功能 板卡使用XC7Z045 作为主处理器,包含Dual ARM Cortex-A9核处理器的嵌入式处理,PS端32bit 1GB容量DDR3存储,1路RS232接口,1路USB接口1路10-100-1000网络接口,PS端QSPI flash存储,PS端SD卡,Emmc存储;PL端64bit 2GB容量DDR3存储,PL端扩展HDMI 输出实现视频显示应用,PL端扩展9路I/O,4个LED指示灯。 PL端外扩AD9361芯片,AD9361是一款高集成度射频(RF)、捷变收发器,提供双通道发射器和接收器、集成式频率合成器以及数字信号处理功能。这款IC具备多样化的高性能和低功耗组合,FMC子卡为2路输入,2路输出的射频收发卡,配合FPGA工作满足3G、4G宏蜂窝时分双工(TDD)和频分双工(FDD)基站应用要求。 板卡数字接口: |--------|---------|-----------------------|--------------------------------|-------------------------------| | | No. | Items | Specifications | Remark | | Tx | 1 | Frequency | 70 ~ 6000 MHz | | | Tx | 2 | Bandwidth | Up to 56 MHz | real-time bandwidth, tunable | | Tx | 3 | Transmission | >5dBm | CW | | Tx | 4 | EVM | <1.5% | Typical:5dBm @20MHz bandwidth | | Tx | 5 | Gain Control Range | >80dB | | | Tx | 6 | Gain Step | 0.25 dB | | | Tx | 7 | ACLR | < -45dBc | @ 0dBm LTE output | | Tx | 8 | Spurious | TBD | | | Tx | 9 | SSB Suppression | 35dBc | | | Tx | 10 | LO Suppression | 50dBc | | | Tx | 11 | DAC Sample Rate (max) | 61.44MS/s | | | Tx | 12 | DAC Resolution | 12bits | | | ||||| | Rx | 1 | Frequency | 70~6000MHz | | | Rx | 2 | Bandwidth | Up to 56 MHz | real-time bandwidth, tunable | | Rx | 3 | Sensitivity: | -90dBm@20MHz | Noise Figure < 8dB | | Rx | 4 | EVM | <1.5% | @ -30dBm input | | Rx | 5 | Gain Control Range | >60dB | | | Rx | 6 | Gain Step | 1dB | | | Rx | 7 | Blocking | TBD | | | Rx | 8 | Noise Figure | <8db | Maximum RX gain | | Rx | 9 | IIP3 (@ typ NF) | -25dBm | | | Rx | 10 | ADC Sample Rate (max) | 61.44MS/s | | | Rx | 11 | ADC Resolution | 12bits | | | Rx | 12 | ADC Wideband SFDR | 78dBc | | | | 1 | Voltage | 3.3V | | | | 2 | ON/OFF TIME | <6us | For TDD model | | | 3 | Duplexing Model | TDD or FDD | | | | 4 | W/ GPSDO Reference | 0.01ppb | | 三、软件系统 参考ADI开发板官网全套软件,固件程序芯片XC7Z100。 ARM linux 软件和客户端软件一模一样。 客户开发主要考虑LibIIO API应用,客户端应用,或者固件程序里面修改PL端的逻辑代码,插入个性化算法应用。其中LibIIO API功能架构如下图图6所示。 * ● PS 端32bit 1GB 容量 DDR3 存储 * ● PS端RS232接口 * ● PS端USB接口 * ● PS端1路 10-100-1000 Mbps Ethernet (RGMII) 网络接口 * ● PS端QSPI flash 存储 * ● PS端 SD卡,Emmc存储 * ● PL端64bit 2GB 容量DDR3 存储 * ● PL端扩展HDMI 输出实现视频显示应用 * ● PL端扩展16路 I/O, 4个LED指示灯 * ● PL端扩展1路10G SFP+光线接口 板卡模拟接口: * ● 双接收:RX1、RX2;双发送:TX1、TX2;外部本振接口:EXT_LO;外部时钟参考:REF_CLK_IN * ● 集成12位DAC和ADC的RF 2 × 2收发器 * ● TX频段:47 MHz至6.0 GHz * ● RX频段:70 MHz至6.0 GHz * ● 支持TDD和FDD操作 * ● 可调谐通道带宽:<200 kHz至56 MHz * ● 双通道接收器:6路差分或12路单端输入 * ● 出色的接收器灵敏度,噪声系数为2 dB (800 MHz LO) * ● RX增益控制 * 实时监控和控制信号用于手动增益 * 独立的自动增益控制 * ● 双发射器:4路差分输出 * ● 高线性度宽带发射器 * TX EVM:≤−40 dB * TX噪声:≤−157 dBm/Hz本底噪声 * TX监控器:动态范围≥66 dB,精度=1 dB * ● 集成式小数N分频频率合成器 * ● 2.4 Hz最大本振(LO)步长 * * 板卡性能指标: * 物理特性 * ● 尺寸:120x162.4mm; * ● 工作温度:工业级 -40℃~ +85℃。 * 图6 LibIIO API功能架构图 AD9361设备树及驱动 SPI访问,AD,DA访问。 如上,2,3步骤 构建ZYNQ-7000 SOC内Ubuntu软件运行环境。镜像文件包括u-boot、内核、设备树以及文件系统。 参考网页: IIO Oscilloscope [Analog Devices Wiki] 软件执行: 数据输出,输出支持单频率,多频和任意波形 | |

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