ARM A64 LDR指令

ARM A64 LDR指令

  • [1 LDR (immediate)](#1 LDR (immediate))
    • [1.1 Post-index](#1.1 Post-index)
    • [1.2 Pre-index](#1.2 Pre-index)
    • [1.3 Unsigned offset](#1.3 Unsigned offset)
  • [2 LDR (literal)](#2 LDR (literal))
  • [3 LDR (register)](#3 LDR (register))
  • [4 其他LDR指令变体](#4 其他LDR指令变体)
    • [4.1 LDRB (immediate)](#4.1 LDRB (immediate))
      • [4.1.1 Post-index](#4.1.1 Post-index)
      • [4.1.2 Pre-index](#4.1.2 Pre-index)
      • [4.1.3 Unsigned offset](#4.1.3 Unsigned offset)
    • [4.2 LDRB (register)](#4.2 LDRB (register))
    • [4.3 LDRH (immediate)](#4.3 LDRH (immediate))
      • [4.3.1 Post-index](#4.3.1 Post-index)
      • [4.3.2 Pre-index](#4.3.2 Pre-index)
      • [4.3.3 Unsigned offset](#4.3.3 Unsigned offset)
    • [4.4 LDRH (register)](#4.4 LDRH (register))
    • [4.5 LDRSB (immediate)](#4.5 LDRSB (immediate))
      • [4.5.1 Post-index](#4.5.1 Post-index)
      • [4.5.2 Pre-index](#4.5.2 Pre-index)
      • [4.5.3 Unsigned offset](#4.5.3 Unsigned offset)
    • [4.6 LDRSB (register)](#4.6 LDRSB (register))
    • [4.7 LDRSH (immediate)](#4.7 LDRSH (immediate))
      • [4.7.1 Post-index](#4.7.1 Post-index)
      • [4.7.2 Pre-index](#4.7.2 Pre-index)
      • [4.7.3 Unsigned offset](#4.7.3 Unsigned offset)
    • [4.8 LDRSH (register)](#4.8 LDRSH (register))
    • [4.9 LDRSW (immediate)](#4.9 LDRSW (immediate))
      • [4.9.1 Post-index](#4.9.1 Post-index)
      • [4.9.2 Pre-index](#4.9.2 Pre-index)
      • [4.9.3 Unsigned offset](#4.9.3 Unsigned offset)
    • [4.10 LDRSW (literal)](#4.10 LDRSW (literal))
    • [4.11 LDRSW (register)](#4.11 LDRSW (register))

Arm Architecture Reference Manual Armv8, for Armv8-A architecture profile

1 LDR (immediate)

Load Register (immediate) loads a word or doubleword from memory and writes it to a register. The address that is used for the load is calculated from a base register and an immediate offset. The Unsigned offset variant scales the immediate offset value by the size of the value accessed before adding it to the base register value.

1.1 Post-index

1.2 Pre-index

1.3 Unsigned offset

2 LDR (literal)

Load Register (literal) calculates an address from the PC value and an immediate offset, loads a word from memory, and writes it to a register.

3 LDR (register)

Load Register (register) calculates an address from a base register value and an offset register value, loads a word from memory, and writes it to a register. The offset register value can optionally be shifted and extended.

4 其他LDR指令变体

4.1 LDRB (immediate)

4.1.1 Post-index

4.1.2 Pre-index

4.1.3 Unsigned offset

4.2 LDRB (register)

4.3 LDRH (immediate)

4.3.1 Post-index

4.3.2 Pre-index

4.3.3 Unsigned offset

4.4 LDRH (register)

4.5 LDRSB (immediate)

4.5.1 Post-index

4.5.2 Pre-index

4.5.3 Unsigned offset

4.6 LDRSB (register)

4.7 LDRSH (immediate)

4.7.1 Post-index

4.7.2 Pre-index

4.7.3 Unsigned offset

4.8 LDRSH (register)

4.9 LDRSW (immediate)

4.9.1 Post-index

4.9.2 Pre-index

4.9.3 Unsigned offset

4.10 LDRSW (literal)

4.11 LDRSW (register)

相关推荐
aseity1 小时前
Debian10 ARM KVM 虚拟机安装记录
arm开发
li星野3 小时前
RTOS面试完整模拟题(嵌入式系统方向)
arm开发·面试·职场和发展
路溪非溪6 小时前
BLE的广播、扫描和连接等工作机制总结
linux·arm开发·驱动开发
忆和熙9 小时前
AArch64异常指令与异常表(ARMv8异常机制——AArch64异常调用指令与异常表)
arm开发·arm异常
szxinmai主板定制专家11 小时前
基于 STM32 + FPGA 船舶电站控制器设计与实现
arm开发·人工智能·stm32·嵌入式硬件·fpga开发·架构
Flamingˢ11 小时前
基于ARM的裸机程序设计和开发(三):C编程基础与Zynq裸机开发常用方法
c语言·arm开发·单片机
EnglishJun11 小时前
ARM嵌入式学习(八)--- 汇编应用:点亮led
汇编·arm开发·学习
ARM+FPGA+AI工业主板定制专家21 小时前
基于ARM+FPGA+AI的船舶状态智能监测系统(二)软硬件设计,模拟量,温度等采集与分析
arm开发·人工智能·目标检测·fpga开发
梅尔文.古1 天前
ADCU-Ethernet-以太网在AUTOSAR与Linux架构下对比
arm开发·单片机·汽车
szxinmai主板定制专家1 天前
基于ZYNQ MPSOC船舶数据采集仪器设计(一)总体设计方案,包括振动、压力、温度、流量等参数
arm开发·人工智能·嵌入式硬件·fpga开发