国产化FPGA开发板:2050-基于JFMK50T4(XC7A50T)的核心板

|-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
| |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| | ( IEB-PS-3051- 邮票孔) 一、核 心板概述 板卡基于JFMK50T4国产化FPGA芯片,设计的一款工业级核心板,板卡集成主芯片、电源、DDR、配置芯片,大大减轻客户的扩展开发困难。丰富的IO和4个GTP,让用户轻易设计PCIe的数据卡,AD卡,结合本公司国产化AI、AO、DIO模块,为工业应用的全国产硬件设计提供了So easy道路。 ## 板卡原理框图 二、核心板功能介绍 |---------|--------------------------------------------| | 板卡功能 | 参数内容 | | 主处理器 | JFMK50T4(XC7A50T) | | 板卡标准 | 自定义 | | 板载缓存 | 1路 32bit DDR3, 容量2GByte | | 加载Flash | QSPI 128Mbit @S25FL256AGNFI001(EFM25F128A) | | 低速接口 | 134路 LVTTL IO (配置为3.3V,2.5V,1.8V) | | 高速接口 | GTPX4 :(PCIe X4 V2.0 ) (RapidIO)(Aurora) | | 板卡供电 | +12V@3A | | | | | 板卡尺寸 | 60X60 mm | | 板卡重量 | | | | | | 板卡功耗 | 36W | | 工作温度 | Industrial -40℃到+85℃ | ## 三、核心板信号定义 ## 四、核心板扩展应用 与模拟AI、AO、DIO接口,扩展PCIe,PXIe,VPX的采集卡,实现系列化的全国产化工业板卡。 | |

标签: VC709E板卡, zynq 通用计算平台, 工业图像输出, 模拟型号处理, 视频输入输出子卡, 无线通信, 国产化FPGA芯片

相关推荐
匠行科技10 小时前
6U‑VPX 高密度异构处理板硬件方案实践
fpga开发·硬件工程
努力搬砖的小H11 小时前
FPGA应用技巧之AXI4-FULL-uiFDMA IP仿真验证
经验分享·fpga开发·axi
hexiaoyan8271 天前
高速图像采集卡处理板卡设计原理图:10-基于TMS320C6678+XC7K325T的6U CPCI Full Camera Link图像处理平台
fpga开发·高速图像采集·图像采集卡·c6678板卡
szxinmai主板定制专家1 天前
储能EMS + 协调控制器实战:RK3568/3576/3588+FPGA+AI 故障录波与诊断
人工智能·深度学习·机器学习·fpga开发·rk3588·rk3576·协调控制器
星夜离尘561 天前
FPGA 定点数缩位:截断、舍入与饱和,避免溢出回绕
fpga开发·定点数
星夜离尘561 天前
I²C总线卡死:先分清SCL拉低、SDA拉低,再谈9个时钟恢复
fpga开发·verilog·i2c
鸥梨菌Honevid1 天前
STA 与 CDC
fpga开发
科恒盛远1 天前
ZU902 与 FMC200 高速采集示波器实测
fpga开发
NamoAmitabha1281 天前
日常问答1---deepseek
fpga开发
鸥梨菌Honevid1 天前
异步FIFO为什么用打两拍的格雷码?
fpga开发