PH2做为功能EMB_IN4,查资料,对应的是Timer4_3

程序设计
主函数
int32_t main(void)
{
stc_emb_tmr4_init_t stcEmbInit;
/* MCU Peripheral registers write unprotected */
LL_PERIPH_WE(LL_PERIPH_SEL);
/* Configure TMR4 PWM. */
TMR4_PwmConfig();
/* Enable EMB peripheral clock */
EMB_FCG_ENABLE();
// /* EMB: initialize EMB pin */
GPIO_SetFunc(EMB_PORT, EMB_PIN, EMB_GPIO_FUNC);
/* EMB: initialize */
(void)EMB_TMR4_StructInit(&stcEmbInit);
stcEmbInit.stcPort.stcPort1.u32PortState = EMB_PORT1_ENABLE;
stcEmbInit.stcPort.stcPort1.u32PortLevel = EMB_PORT1_DETECT_LVL_HIGH;//EMB_PORT1_DETECT_LVL_LOW;
(void)EMB_TMR4_Init(EMB_GROUP, &stcEmbInit);
/* EMB: enable interrupt */
EMB_IntCmd(EMB_GROUP, EMB_INT_PORT1, ENABLE);
/* EMB: register IRQ handler && configure NVIC. */
(void)INTC_ShareIrqCmd(EMB_INT_SRC, ENABLE);
NVIC_ClearPendingIRQ(EMB_INT_IRQn);
NVIC_SetPriority(EMB_INT_IRQn, DDL_IRQ_PRIO_DEFAULT);
NVIC_EnableIRQ(EMB_INT_IRQn);
/* MCU Peripheral registers write protected */
LL_PERIPH_WP(LL_PERIPH_SEL);
for (;;) {
}
}
定时器配置
static void TMR4_PwmConfig(void)
{
stc_tmr4_init_t stcTmr4Init;
stc_tmr4_oc_init_t stcTmr4OcInit;
stc_tmr4_pwm_init_t stcTmr4PwmInit;
un_tmr4_oc_ocmrh_t unTmr4OcOcmrh;
un_tmr4_oc_ocmrl_t unTmr4OcOcmrl;
/* Initialize PWM I/O */
GPIO_SetFunc(TIM4_OXH_PORT, TIM4_OXH_PIN, TIM4_OXH_GPIO_FUNC);
GPIO_SetFunc(TIM4_OXL_PORT, TIM4_OXL_PIN, TIM4_OXL_GPIO_FUNC);
/* Enable TMR4 peripheral clock */
TMR4_FCG_ENABLE();
/************************* Configure TMR4 counter *************************/
/* TMR4 counter: initialize */
(void)TMR4_StructInit(&stcTmr4Init);
stcTmr4Init.u16ClockDiv = TMR4_CLK_DIV1024;
stcTmr4Init.u16PeriodValue = TMR4_CNT_PERIOD_VALUE(stcTmr4Init.u16ClockDiv);
(void)TMR4_Init(TMR4_UNIT, &stcTmr4Init);
/************************* Configure TMR4 output-compare ******************/
/* TMR4 OC channel: initialize TMR4 structure */
(void)TMR4_OC_StructInit(&stcTmr4OcInit);
stcTmr4OcInit.u16CompareValue = (stcTmr4Init.u16PeriodValue / 2U);
/* TMR4 OC channel: initialize channel */
(void)TMR4_OC_Init(TMR4_UNIT, TMR4_OC_CH_UH, &stcTmr4OcInit);
(void)TMR4_OC_Init(TMR4_UNIT, TMR4_OC_CH_UL, &stcTmr4OcInit);
/* TMR4 OC high channel: compare mode OCMR[15:0] = 0x0FFF = b 0000 1111 1111 1111 */
unTmr4OcOcmrh.OCMRx_f.OCFDCH = TMR4_OC_OCF_SET; /* bit[0] 1 */
unTmr4OcOcmrh.OCMRx_f.OCFPKH = TMR4_OC_OCF_SET; /* bit[1] 1 */
unTmr4OcOcmrh.OCMRx_f.OCFUCH = TMR4_OC_OCF_SET; /* bit[2] 1 */
unTmr4OcOcmrh.OCMRx_f.OCFZRH = TMR4_OC_OCF_SET; /* bit[3] 1 */
unTmr4OcOcmrh.OCMRx_f.OPDCH = TMR4_OC_INVT; /* Bit[5:4] 11 */
unTmr4OcOcmrh.OCMRx_f.OPPKH = TMR4_OC_INVT; /* Bit[7:6] 11 */
unTmr4OcOcmrh.OCMRx_f.OPUCH = TMR4_OC_INVT; /* Bit[9:8] 11 */
unTmr4OcOcmrh.OCMRx_f.OPZRH = TMR4_OC_INVT; /* Bit[11:10] 11 */
unTmr4OcOcmrh.OCMRx_f.OPNPKH = TMR4_OC_HOLD; /* Bit[13:12] 00 */
unTmr4OcOcmrh.OCMRx_f.OPNZRH = TMR4_OC_HOLD; /* Bit[15:14] 00 */
TMR4_OC_SetHighChCompareMode(TMR4_UNIT, TMR4_OC_CH_UH, unTmr4OcOcmrh);
/* TMR4 OC low channel: compare mode OCMR[31:0] 0x0FF0 0FFF = b 0000 1111 1111 0000 0000 1111 1111 1111 */
unTmr4OcOcmrl.OCMRx_f.OCFDCL = TMR4_OC_OCF_SET; /* bit[0] 1 */
unTmr4OcOcmrl.OCMRx_f.OCFPKL = TMR4_OC_OCF_SET; /* bit[1] 1 */
unTmr4OcOcmrl.OCMRx_f.OCFUCL = TMR4_OC_OCF_SET; /* bit[2] 1 */
unTmr4OcOcmrl.OCMRx_f.OCFZRL = TMR4_OC_OCF_SET; /* bit[3] 1 */
unTmr4OcOcmrl.OCMRx_f.OPDCL = TMR4_OC_INVT; /* bit[5:4] 11 */
unTmr4OcOcmrl.OCMRx_f.OPPKL = TMR4_OC_INVT; /* bit[7:6] 11 */
unTmr4OcOcmrl.OCMRx_f.OPUCL = TMR4_OC_INVT; /* bit[9:8] 11 */
unTmr4OcOcmrl.OCMRx_f.OPZRL = TMR4_OC_INVT; /* bit[11:10] 11 */
unTmr4OcOcmrl.OCMRx_f.OPNPKL = TMR4_OC_HOLD; /* bit[13:12] 00 */
unTmr4OcOcmrl.OCMRx_f.OPNZRL = TMR4_OC_HOLD; /* bit[15:14] 00 */
unTmr4OcOcmrl.OCMRx_f.EOPNDCL = TMR4_OC_HOLD; /* bit[17:16] 00 */
unTmr4OcOcmrl.OCMRx_f.EOPNUCL = TMR4_OC_HOLD; /* bit[19:18] 00 */
unTmr4OcOcmrl.OCMRx_f.EOPDCL = TMR4_OC_INVT; /* bit[21:20] 11 */
unTmr4OcOcmrl.OCMRx_f.EOPPKL = TMR4_OC_INVT; /* bit[23:22] 11 */
unTmr4OcOcmrl.OCMRx_f.EOPUCL = TMR4_OC_INVT; /* bit[25:24] 11 */
unTmr4OcOcmrl.OCMRx_f.EOPZRL = TMR4_OC_INVT; /* bit[27:26] 11 */
unTmr4OcOcmrl.OCMRx_f.EOPNPKL = TMR4_OC_HOLD; /* bit[29:28] 00 */
unTmr4OcOcmrl.OCMRx_f.EOPNZRL = TMR4_OC_HOLD; /* bit[31:30] 00 */
TMR4_OC_SetLowChCompareMode(TMR4_UNIT, TMR4_OC_CH_UL, unTmr4OcOcmrl);
/* TMR4 OC: enable */
TMR4_OC_Cmd(TMR4_UNIT, TMR4_OC_CH_UH, ENABLE);
TMR4_OC_Cmd(TMR4_UNIT, TMR4_OC_CH_UL, ENABLE);
/************************* Configure TMR4 PWM *****************************/
/* TMR4 PWM: initialize */
(void)TMR4_PWM_StructInit(&stcTmr4PwmInit);
stcTmr4PwmInit.u16Polarity = TMR4_PWM_OXH_HOLD_OXL_INVT;
(void)TMR4_PWM_Init(TMR4_UNIT, TMR4_PWM_CH_U, &stcTmr4PwmInit);
/* TMR4 PWM: set PWM pin output when EMB event occur. */
TMR4_PWM_SetAbnormalPinStatus(TMR4_UNIT, TMR4_PWM_PIN_OUH, TMR4_PWM_ABNORMAL_PIN_LOW);
TMR4_PWM_SetAbnormalPinStatus(TMR4_UNIT, TMR4_PWM_PIN_OUL, TMR4_PWM_ABNORMAL_PIN_LOW);
/* Start TMR4 count. */
TMR4_Start(TMR4_UNIT);
}
宏定义:
/* TMR4 PWM pin definition */
#define TIM4_OXH_PORT (GPIO_PORT_B)
#define TIM4_OXH_PIN (GPIO_PIN_09)
#define TIM4_OXH_GPIO_FUNC (GPIO_FUNC_2)
#define TIM4_OXL_PORT (GPIO_PORT_B)
#define TIM4_OXL_PIN (GPIO_PIN_08)
#define TIM4_OXL_GPIO_FUNC (GPIO_FUNC_2)
/* TMR4 unit definition */
#define TMR4_UNIT (CM_TMR4_3)
#define TMR4_FCG_ENABLE() (FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMR4_3, ENABLE))
/* TMR4 count period value(250ms) */
#define TMR4_CNT_PERIOD_VALUE(div) ((uint16_t)(TMR4_ClockFreq() / (1UL << (uint32_t)(div)) / 4UL) - 1U)
/* EMB unit definition */
#define EMB_GROUP (CM_EMB3)
#define EMB_FCG_ENABLE() (FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_EMB, ENABLE))
/* EMB interrupt definition */
#define EMB_INT_IRQn (INT140_IRQn)
#define EMB_INT_SRC (INT_SRC_EMB_GR3)
/* EMB pin definition */
#define EMB_PORT (GPIO_PORT_H) /* PH02: EMB_IN4 */
#define EMB_PIN (GPIO_PIN_02)
#define EMB_GPIO_FUNC (GPIO_FUNC_6)
中断:
void EMB_GR3_IrqHandler(void)
{
if (SET == EMB_GetStatus(EMB_GROUP, EMB_FLAG_PORT1)) {
/* Clear the EMB port status. */
EMB_ClearStatus(EMB_GROUP, EMB_FLAG_PORT1);
}
}
测试结果:
PH2悬空时,PB8和PB9输出互补PWM
PH2为高时,PB8和PB9输出低电平
PH2为低时,PB8和PB9输出PWM,没有高频。