工作区文件编码
.vscode/settings.json
json
{
// 编码
"files.encoding": "gbk",
"files.autoGuessEncoding": false,
// 行尾统一
"files.eol": "\n",
// 文件关联
"files.associations": {
"*.v": "verilog",
"*.vh": "verilog",
"*.sv": "systemverilog"
},
// 搜索时忽略 Vivado 垃圾目录
"search.exclude": {
"**/.Xil": true,
"**/.ip_user_files": true,
"**/*.runs": true,
"**/*.cache": true
}
}
vscode工作区引用其他目录源文件
用于编辑vivado自动生成部分的代码
hdl.code-workspace
json
{
"folders": [
{ "path": "./rtl" },
{ "path": "../../../../mi_vivado/ip_repo" },
{ "path": "../../../../mi_vivado/project.gen" }
],
"settings": {}
}
connect.tcl
在 Vivado BD 中,如果手工连错一根线,整个网络号(net)上所有连接都会被断开
bash
connect_bd_net [get_bd_ports o_port4_0] [get_bd_pins pl_bram_rd_0/o_port4]
connect_bd_net [get_bd_ports i_port0_0] [get_bd_pins pl_bram_rd_0/i_port0]
connect_bd_net [get_bd_ports i_port1_0] [get_bd_pins pl_bram_rd_0/i_port1]
connect_bd_net [get_bd_ports i_port2_0] [get_bd_pins pl_bram_rd_0/i_port2]
connect_bd_net [get_bd_ports i_port3_0] [get_bd_pins pl_bram_rd_0/i_port3]
connect_bd_net [get_bd_ports i_sys_clk_0] [get_bd_pins pl_bram_rd_0/i_sys_clk]
connect_bd_net [get_bd_ports i_sys_rst_n_0] [get_bd_pins pl_bram_rd_0/i_sys_rst_n]
#或
proc connect_if_exist {src dst} {
if {[llength [get_bd_pins $src -quiet]] && \
[llength [get_bd_pins $dst -quiet]]} {
connect_bd_net [get_bd_pins $src] [get_bd_pins $dst]
}
}
connect_if_exist pl_bram_rd_0/o_port4 o_port4_0
connect_if_exist pl_bram_rd_0/i_sys_clk i_sys_clk_0
添加rtl文件
bash
# 导入文件
```shell
set rtl_dir D:/workspace/mi_prj/mi_vivado/ip_repo/mi_pl_1.0/hdl
add_files $rtl_dir/bram_rd.v
add_files $rtl_dir/mi_pl_v1_0_S00_AXI.v
add_files $rtl_dir/mi_pl_v1_0.v
add_files $rtl_dir/uart_rx.v
add_files $rtl_dir/uart_tx.v
add_files $rtl_dir/mi_gram_mock.v
add_files $rtl_dir/mi_reg_map.vh
忽略文件
.gitignore
bash
# Vivado
.Xil/
*.jou
*.log
*.str
*.cache/
*.runs/
*.sdk/
.ip_user_files/
# OS
.DS_Store
Thumbs.db