chipcamp@chipcamp:~/src/riscv$ cat /etc/os-release ##ubuntu22系统@十年旧机器。
PRETTY_NAME="Ubuntu 22.04 LTS"
NAME="Ubuntu"
VERSION_ID="22.04"
VERSION ="22.04 (Jammy Jellyfish)"
VERSION_CODENAME=jammy
ID=ubuntu
ID_LIKE=debian
HOME_URL="https://www.ubuntu.com/"
SUPPORT_URL="https://help.ubuntu.com/"
BUG_REPORT_URL="https://bugs.launchpad.net/ubuntu/"
PRIVACY_POLICY_URL="https://www.ubuntu.com/legal/terms-and-policies/privacy-policy"
UBUNTU_CODENAME=jammy
chipcamp@chipcamp:~/src/riscv$ which iverilog
/usr/bin/iverilog
chipcamp@chipcamp:~/src/riscv$ which verilator
/usr/bin/ verilator
chipcamp@chipcamp:~/src/riscv$ which gtkwave
/usr/bin/gtkwave
chipcamp@chipcamp:~/src/riscv$ which riscv64-unknown-elf-gcc
/usr/bin/riscv64-unknown-elf-gcc
chipcamp@chipcamp:~/src/riscv$
chipcamp@chipcamp:~/src/riscv$ dpkg-query -S /usr/bin/iverilog /usr/bin/verilator /usr/bin/gtkwave /usr/bin/riscv64-unknown-elf-gcc
iverilog: /usr/bin/iverilog
verilator: /usr/bin/verilator
gtkwave: /usr/bin/gtkwave
gcc-riscv64-unknown-elf: /usr/bin/riscv64-unknown-elf-gcc
------以上所有的软件，都是使用apt-get install安装的，这是本文所说的"0依赖"。
chipcamp@chipcamp:~/src/riscv$ git clone https://gitcode.com/ChipCamp/e203_hbirdv2.git
Cloning into 'e203_hbirdv2'...
remote: Enumerating objects: 1502, done.
remote: Total 1502 (delta 0), reused 0 (delta 0), pack-reused 1502 (from 1)
Receiving objects: 100% (1502/1502), 62.36 MiB | 509.00 KiB/s, done.
Resolving deltas: 100% (735/735), done.
chipcamp@chipcamp:~/src/riscv$ ls -la
total 32
drwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 16:03 .
drwxrwxr-x 7 chipcamp chipcamp 4096 Oct 7 09:32 ..
drwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 11:04 darkriscv
drwxrwxr-x 12 chipcamp chipcamp 4096 Oct 7 16:06 e203_hbirdv2
drwxrwxr-x 6 chipcamp chipcamp 4096 Oct 7 12:39 nerv
drwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 14:19 picorv32
drwxrwxr-x 12 chipcamp chipcamp 4096 Oct 7 14:03 tinyriscv
drwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 14:55 yarvi
chipcamp@chipcamp:~/src/riscv cd e203_hbirdv2/ chipcamp@chipcamp:\~/src/riscv/e203_hbirdv2 ls -la
total 84
drwxrwxr-x 12 chipcamp chipcamp 4096 Oct 7 16:06 .
drwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 16:03 ..
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 16:05 comments
drwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 16:05 doc
-rw-rw-r-- 1 chipcamp chipcamp 2551 Oct 7 16:06 e203_core.core
-rw-rw-r-- 1 chipcamp chipcamp 4358 Oct 7 16:06 e203_soc.core
drwxrwxr-x 4 chipcamp chipcamp 4096 Oct 7 16:06 fpga
drwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 16:06 .git
drwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 16:05 .github
-rw-rw-r-- 1 chipcamp chipcamp 46 Oct 7 16:05 .gitignore
-rw-rw-r-- 1 chipcamp chipcamp 11358 Oct 7 16:05 LICENSE
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 16:06 pics
-rw-rw-r-- 1 chipcamp chipcamp 4815 Oct 7 16:05 README.md
drwxrwxr-x 4 chipcamp chipcamp 4096 Oct 7 16:06 riscv-tools
drwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 16:06 rtl
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 16:06 tb
drwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 16:06 vsim
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "*akefile"
./vsim/Makefile
./vsim/bin/run.makefile
./doc/Makefile
./fpga/mcu200t/Makefile
./fpga/ddr200t/Makefile
./fpga/Makefile
./riscv-tools/fpga_test4sim/coremark4sim/Makefile
./riscv-tools/fpga_test4sim/dhrystone4sim/Makefile
./riscv-tools/riscv-tests/benchmarks/Makefile
./riscv-tools/riscv-tests/mt/Makefile
./riscv-tools/riscv-tests/isa/Makefile
./riscv-tools/riscv-tests/debug/Makefile
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ cd vsim
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2/vsim$ ls -la
total 24
drwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 16:06 .
drwxrwxr-x 12 chipcamp chipcamp 4096 Oct 7 16:06 ..
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 16:06 bin
-rw-rw-r-- 1 chipcamp chipcamp 12 Oct 7 16:06 .gitignore
-rw-rw-r-- 1 chipcamp chipcamp 2083 Oct 7 16:06 Makefile
-rw-rw-r-- 1 chipcamp chipcamp 729 Oct 7 16:06 README.md
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2/vsim$ vi Makefile
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2/vsim$ make
mkdir -p /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run
rm -f /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/Makefile
ln -s /home/chipcamp/src/riscv/e203_hbirdv2/vsim/bin/run.makefile /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/Makefile
make compile RUN_DIR=/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run SIM_TOOL=iverilog -C /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run
make1: Entering directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
sed -i '1i\`define iverilog\' /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/tb/tb_top.v
sed: can't read /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/tb/tb_top.v: No such file or directory
make1: *** Makefile:118: compile.flg Error 2
make1: Leaving directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
make: *** Makefile:30: compile Error 2
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2/vsim$ make all
make compile RUN_DIR=/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run SIM_TOOL=iverilog -C /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run
make1: Entering directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
sed -i '1i\`define iverilog\' /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/tb/tb_top.v
sed: can't read /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/tb/tb_top.v: No such file or directory
make1: *** Makefile:118: compile.flg Error 2
make1: Leaving directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
make: *** Makefile:30: compile Error 2
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2/vsim$ find .. -name "tb_top.v"
../tb/tb_top.v
----有这个文件但不在install/tb目录下，而是在tb目录下。
----不过，不过，这个错误并不是根本原因，或者说不是解决办法。
----解决办法是，先运行一次make install，然后再运行make all就可以了！
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2/vsim$ make install
mkdir -p /home/chipcamp/src/riscv/e203_hbirdv2/vsim/install/tb
cp /home/chipcamp/src/riscv/e203_hbirdv2/vsim/../tb/*.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/install/tb -rf
cp /home/chipcamp/src/riscv/e203_hbirdv2/vsim/../rtl/e203 /home/chipcamp/src/riscv/e203_hbirdv2/vsim/install/rtl -rf
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2/vsim$ make all
make compile RUN_DIR=/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run SIM_TOOL=iverilog -C /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run
make1: Entering directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
sed -i '1i\`define iverilog\' /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/tb/tb_top.v
iverilog -o vvp.exec -I "/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/" -I "/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/" -I "/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_i2c/" -D DISABLE_SV_ASSERTION=1 -g2005-sv /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/config.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_biu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_clk_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_clkgate.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_core.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_cpu_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_cpu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_defines.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_dtcm_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_dtcm_ram.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_extend_csr.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_alu_bjp.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_alu_csrctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_alu_dpath.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_alu_lsuagu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_alu_muldiv.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_alu_rglr.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_alu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_branchslv.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_commit.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_csr.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_decode.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_disp.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_excp.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_longpwbck.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_nice.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_oitf.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_regfile.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_exu_wbck.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_ifu_ifetch.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_ifu_ift2icb.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_ifu_litebpu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_ifu_minidec.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_ifu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_irq_sync.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_itcm_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_itcm_ram.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_lsu_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_lsu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_reset_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/core/e203_srams.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/debug/sirv_debug_csr.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/debug/sirv_debug_module.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/debug/sirv_debug_ram.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/debug/sirv_debug_rom.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/debug/sirv_jtag_dtm.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/fab/sirv_icb1to16_bus.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/fab/sirv_icb1to2_bus.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/fab/sirv_icb1to8_bus.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_1cyc_sram_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_gnrl_bufs.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_gnrl_dffs.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_gnrl_icbs.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_gnrl_ram.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_gnrl_xchecker.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_sim_ram.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/general/sirv_sram_icb_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/mems/sirv_mrom_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/mems/sirv_mrom.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_aon_lclkgen_regs.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_aon_porrst.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_aon_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_aon.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_aon_wrapper.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_AsyncResetReg.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_AsyncResetRegVec_129.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_AsyncResetRegVec_1.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_AsyncResetRegVec_36.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_AsyncResetRegVec.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_clint_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_clint.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_DeglitchShiftRegister.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_expl_axi_slv.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_flash_qspi_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_flash_qspi.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_hclkgen_regs.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_jtaggpioport.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_LevelGateway.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_plic_man.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_plic_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_pmu_core.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_pmu.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_qspi_arbiter.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_qspi_fifo.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_qspi_media.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_qspi_physical.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_queue_1.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_queue.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_repeater_6.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_ResetCatchAndSync_2.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_ResetCatchAndSync.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_rtc.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_spi_flashmap.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_tlfragmenter_qspi_1.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_tl_repeater_5.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_tlwidthwidget_qspi.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/sirv_wdog.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/soc/e203_soc_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_clint.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_gfcm.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_hclkgen_rstsync.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_hclkgen.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_main.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_mems.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_nice_core.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_perips.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_plic.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_pllclkdiv.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_pll.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/subsys/e203_subsys_top.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/adv_timer_apb_if.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/apb_adv_timer.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/comparator.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/input_stage.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/prescaler.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/timer_cntrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/timer_module.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_adv_timer/up_down_counter.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_gpio/apb_gpio.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_i2c/apb_i2c.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_i2c/i2c_master_bit_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_i2c/i2c_master_byte_ctrl.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_i2c/i2c_master_defines.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_spi_master/apb_spi_master.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_spi_master/spi_master_apb_if.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_spi_master/spi_master_clkgen.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_spi_master/spi_master_controller.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_spi_master/spi_master_fifo.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_spi_master/spi_master_rx.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_spi_master/spi_master_tx.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_uart/apb_uart.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_uart/io_generic_fifo.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_uart/uart_interrupt.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_uart/uart_rx.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/rtl/perips/apb_uart/uart_tx.v /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../install/tb/tb_top.v ;
touch compile.flg
make1: Leaving directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
make run DUMPWAVE=1 TESTCASE=/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../../riscv-tools/riscv-tests/isa/generated/rv32ui-p-add SIM_TOOL=iverilog RUN_DIR=/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run -C /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run
make1: Entering directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
rm -rf rv32ui-p-add
mkdir rv32ui-p-add
cd rv32ui-p-add; vvp /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/vvp.exec -lxt2 +DUMPWAVE=1 +TESTCASE=/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../../riscv-tools/riscv-tests/isa/generated/rv32ui-p-add +SIM_TOOL=iverilog 2>&1 | tee rv32ui-p-add.log; cd /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run;
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
TESTCASE= /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../../riscv-tools/riscv-tests/isa/generated/rv32ui-p-add
iverlog used
LXT2 info: dumpfile tb_top.vcd opened for output.
ITCM 0x00: 340510730001aa0d
ITCM 0x01: ff85051300002517
ITCM 0x02: 01f5222301e52023
ITCM 0x03: 040f416334202f73
ITCM 0x04: 4fa507ff02634fa1
ITCM 0x05: 0c634fad05ff0f63
ITCM 0x06: 0bff05634f8505ff
ITCM 0x07: 4f9d0dff00634f95
ITCM 0x16: 2f03f52505130000
ITCM 0x20: 2f8300052f03f065
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~ Test Result Summary ~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~TESTCASE: /home/chipcamp/src/riscv/e203_hbirdv2/vsim/run/../../riscv-tools/riscv-tests/isa/generated/rv32ui-p-add ~~~~~~~~~~~~~
~~~~~~~~~~~~~~Total cycle_count value: 25804 ~~~~~~~~~~~~~
~~~~~~~~~~The valid Instruction Count: 16560 ~~~~~~~~~~~~~
~~~~~The test ending reached at cycle: 25758 ~~~~~~~~~~~~~
~~~~~~~~~~~~~~~The final x3 Reg value: 1 ~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~ TEST_PASS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~ ##### ## #### #### ~~~~~~~~~~~~~~~~
~~~~~~~~~ # # # # # # ~~~~~~~~~~~~~~~~
~~~~~~~~~ # # # # #### #### ~~~~~~~~~~~~~~~~
~~~~~~~~~ ##### ###### # #~~~~~~~~~~~~~~~~
~~~~~~~~~ # # # # # # #~~~~~~~~~~~~~~~~
~~~~~~~~~ # # # #### #### ~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
make1: Leaving directory '/home/chipcamp/src/riscv/e203_hbirdv2/vsim/run'
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "*.v" | wc
276 276 11347
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ grep -raw "readmemh" *
tb/tb_top.v: $readmemh({testcase, ".verilog"}, itcm_mem);
vsim/run/vvp.exec: %vpi_call/w 6 271 "$readmemh", S<0,vec4,u2464>, v0x63e8a457b460 {1 0 0};
vsim/install/tb/tb_top.v: $readmemh({testcase, ".verilog"}, itcm_mem);
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "vvp.exec"
./vsim/run/vvp.exec
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "vvp.exec" | xargs ls -l
-rwxr-xr-x 1 chipcamp chipcamp 8970035 Oct 7 16:12 ./vsim/run/vvp.exec
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "vvp.exec" | xargs file
./vsim/run/vvp.exec: a /usr/bin/vvp script, ASCII text executable
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$
----make all测试通过，打印出TEST_PASS。这个测试例的神奇之处在于，200多个.v文件，作为iVerilog命令行的参数，进行仿真，使用了一个测试用例rv32ui-p-add。
----接下来还有一些make的target，其中make regress可以进行很多很多TESTCASE的测试。
----200多个.v文件，11万行verilog代码，是一个相当大的项目了。欣赏一下。
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "*.v" | xargs wc
359 938 11409 ./tb/tb_top.v
360 940 11426 ./vsim/install/tb/tb_top.v
356 907 14159 ./vsim/install/rtl/fab/sirv_icb1to2_bus.v
1028 2483 44609 ./vsim/install/rtl/fab/sirv_icb1to16_bus.v
677 1665 28575 ./vsim/install/rtl/fab/sirv_icb1to8_bus.v
94 246 3400 ./vsim/install/rtl/subsys/e203_subsys_clint.v
57 167 2209 ./vsim/install/rtl/subsys/e203_subsys_hclkgen_rstsync.v
2153 5348 77305 ./vsim/install/rtl/subsys/e203_subsys_perips.v
517 1233 17417 ./vsim/install/rtl/subsys/e203_subsys_mems.v
62 211 2452 ./vsim/install/rtl/subsys/e203_subsys_pllclkdiv.v
655 1404 25414 ./vsim/install/rtl/subsys/e203_subsys_top.v
150 355 4732 ./vsim/install/rtl/subsys/e203_subsys_plic.v
53 190 2145 ./vsim/install/rtl/subsys/e203_subsys_pll.v
505 2133 23180 ./vsim/install/rtl/subsys/e203_subsys_nice_core.v
116 328 3693 ./vsim/install/rtl/subsys/e203_subsys_hclkgen.v
109 248 3158 ./vsim/install/rtl/subsys/e203_subsys_gfcm.v
910 2262 35792 ./vsim/install/rtl/subsys/e203_subsys_main.v
87 234 2575 ./vsim/install/rtl/general/sirv_gnrl_ram.v
49 155 1987 ./vsim/install/rtl/general/sirv_gnrl_xchecker.v
167 453 5705 ./vsim/install/rtl/general/sirv_sram_icb_ctrl.v
101 293 3115 ./vsim/install/rtl/general/sirv_sim_ram.v
523 1855 15365 ./vsim/install/rtl/general/sirv_gnrl_bufs.v
109 319 3699 ./vsim/install/rtl/general/sirv_1cyc_sram_ctrl.v
276 636 6294 ./vsim/install/rtl/general/sirv_gnrl_dffs.v
1843 5385 61041 ./vsim/install/rtl/general/sirv_gnrl_icbs.v
344 917 13172 ./vsim/install/rtl/core/e203_dtcm_ctrl.v
117 621 5563 ./vsim/install/rtl/core/e203_ifu_litebpu.v
636 2818 31149 ./vsim/install/rtl/core/e203_exu_alu_muldiv.v
1234 4957 54374 ./vsim/install/rtl/core/e203_exu_decode.v
244 728 9240 ./vsim/install/rtl/core/e203_ifu.v
108 282 3169 ./vsim/install/rtl/core/e203_reset_ctrl.v
115 441 4903 ./vsim/install/rtl/core/e203_exu_wbck.v
129 473 5007 ./vsim/install/rtl/core/e203_exu_regfile.v
785 2230 41575 ./vsim/install/rtl/core/e203_defines.v
52 166 2086 ./vsim/install/rtl/core/e203_extend_csr.v
571 1698 22490 ./vsim/install/rtl/core/e203_itcm_ctrl.v
71 186 2565 ./vsim/install/rtl/core/e203_dtcm_ram.v
53 155 1941 ./vsim/install/rtl/core/e203_clkgate.v
962 2223 32453 ./vsim/install/rtl/core/e203_exu.v
680 3134 26723 ./vsim/install/rtl/core/e203_exu_csr.v
903 2763 35926 ./vsim/install/rtl/core/e203_exu_alu.v
948 2437 40267 ./vsim/install/rtl/core/e203_biu.v
112 237 3241 ./vsim/install/rtl/core/e203_ifu_minidec.v
119 419 4850 ./vsim/install/rtl/core/e203_exu_alu_rglr.v
137 523 5724 ./vsim/install/rtl/core/e203_exu_alu_csrctrl.v
133 579 6101 ./vsim/install/rtl/core/e203_exu_branchslv.v
551 2522 26989 ./vsim/install/rtl/core/e203_exu_excp.v
964 2765 37883 ./vsim/install/rtl/core/e203_lsu_ctrl.v
291 1583 14455 ./vsim/install/rtl/core/e203_exu_disp.v
111 264 3381 ./vsim/install/rtl/core/e203_irq_sync.v
124 449 5112 ./vsim/install/rtl/core/e203_exu_nice.v
127 422 4975 ./vsim/install/rtl/core/e203_exu_alu_bjp.v
348 879 14483 ./vsim/install/rtl/core/e203_lsu.v
154 505 4944 ./vsim/install/rtl/core/e203_clk_ctrl.v
914 2218 36063 ./vsim/install/rtl/core/e203_core.v
100 280 3756 ./vsim/install/rtl/core/config.v
72 184 2584 ./vsim/install/rtl/core/e203_itcm_ram.v
589 1446 20019 ./vsim/install/rtl/core/e203_cpu_top.v
554 2321 22753 ./vsim/install/rtl/core/e203_ifu_ifetch.v
348 857 12641 ./vsim/install/rtl/core/e203_exu_commit.v
532 1416 17291 ./vsim/install/rtl/core/e203_exu_alu_dpath.v
201 645 7702 ./vsim/install/rtl/core/e203_exu_longpwbck.v
896 2077 33341 ./vsim/install/rtl/core/e203_cpu.v
176 649 7182 ./vsim/install/rtl/core/e203_exu_oitf.v
856 4229 39613 ./vsim/install/rtl/core/e203_ifu_ift2icb.v
713 2871 29779 ./vsim/install/rtl/core/e203_exu_alu_lsuagu.v
114 315 3953 ./vsim/install/rtl/core/e203_srams.v
132 433 4421 ./vsim/install/rtl/mems/sirv_mrom.v
67 214 2512 ./vsim/install/rtl/mems/sirv_mrom_top.v
51 170 2266 ./vsim/install/rtl/perips/sirv_ResetCatchAndSync.v
41 130 1754 ./vsim/install/rtl/perips/sirv_aon_porrst.v
999 2784 40346 ./vsim/install/rtl/perips/apb_adv_timer/adv_timer_apb_if.v
63 273 2127 ./vsim/install/rtl/perips/apb_adv_timer/prescaler.v
606 1828 24848 ./vsim/install/rtl/perips/apb_adv_timer/apb_adv_timer.v
154 545 5104 ./vsim/install/rtl/perips/apb_adv_timer/up_down_counter.v
137 455 4160 ./vsim/install/rtl/perips/apb_adv_timer/input_stage.v
153 504 5241 ./vsim/install/rtl/perips/apb_adv_timer/comparator.v
71 265 2274 ./vsim/install/rtl/perips/apb_adv_timer/timer_cntrl.v
227 699 7982 ./vsim/install/rtl/perips/apb_adv_timer/timer_module.v
495 1559 15078 ./vsim/install/rtl/perips/sirv_qspi_media.v
115 281 3975 ./vsim/install/rtl/perips/sirv_plic_top.v
681 2422 21963 ./vsim/install/rtl/perips/sirv_pmu_core.v
472 1622 15411 ./vsim/install/rtl/perips/sirv_spi_flashmap.v
735 2480 19315 ./vsim/install/rtl/perips/sirv_qspi_physical.v
513 1697 16665 ./vsim/install/rtl/perips/sirv_tlfragmenter_qspi_1.v
522 2340 24865 ./vsim/install/rtl/perips/sirv_plic_man.v
552 1655 25268 ./vsim/install/rtl/perips/sirv_pmu.v
44 139 1803 ./vsim/install/rtl/perips/sirv_AsyncResetRegVec.v
487 1184 18959 ./vsim/install/rtl/perips/sirv_aon_top.v
467 1567 15739 ./vsim/install/rtl/perips/sirv_tlwidthwidget_qspi.v
216 678 6713 ./vsim/install/rtl/perips/apb_uart/uart_rx.v
192 574 5872 ./vsim/install/rtl/perips/apb_uart/uart_tx.v
113 540 4361 ./vsim/install/rtl/perips/apb_uart/io_generic_fifo.v
299 1173 12578 ./vsim/install/rtl/perips/apb_uart/apb_uart.v
89 324 2969 ./vsim/install/rtl/perips/apb_uart/uart_interrupt.v
69 217 2840 ./vsim/install/rtl/perips/sirv_aon_lclkgen_regs.v
228 800 7172 ./vsim/install/rtl/perips/sirv_qspi_arbiter.v
222 904 9789 ./vsim/install/rtl/perips/apb_gpio/apb_gpio.v
84 243 2758 ./vsim/install/rtl/perips/sirv_expl_axi_slv.v
426 1059 9927 ./vsim/install/rtl/perips/sirv_AsyncResetRegVec_129.v
167 589 5423 ./vsim/install/rtl/perips/sirv_tl_repeater_5.v
141 547 6194 ./vsim/install/rtl/perips/sirv_hclkgen_regs.v
43 165 1822 ./vsim/install/rtl/perips/sirv_DeglitchShiftRegister.v
388 1191 15163 ./vsim/install/rtl/perips/sirv_aon_wrapper.v
554 1234 24436 ./vsim/install/rtl/perips/sirv_flash_qspi_top.v
229 751 7132 ./vsim/install/rtl/perips/sirv_qspi_fifo.v
168 584 5379 ./vsim/install/rtl/perips/sirv_repeater_6.v
4014 14533 115829 ./vsim/install/rtl/perips/sirv_flash_qspi.v
6920 27632 208013 ./vsim/install/rtl/perips/sirv_aon.v
93 295 3590 ./vsim/install/rtl/perips/sirv_jtaggpioport.v
165 563 5717 ./vsim/install/rtl/perips/sirv_rtc.v
132 460 4020 ./vsim/install/rtl/perips/sirv_queue_1.v
349 1076 11023 ./vsim/install/rtl/perips/sirv_wdog.v
661 2450 19214 ./vsim/install/rtl/perips/sirv_clint.v
86 243 2681 ./vsim/install/rtl/perips/sirv_AsyncResetRegVec_36.v
171 562 6099 ./vsim/install/rtl/perips/sirv_queue.v
51 170 2274 ./vsim/install/rtl/perips/sirv_ResetCatchAndSync_2.v
156 465 7226 ./vsim/install/rtl/perips/sirv_clint_top.v
38 126 1729 ./vsim/install/rtl/perips/sirv_AsyncResetReg.v
128 440 4157 ./vsim/install/rtl/perips/apb_spi_master/spi_master_tx.v
132 456 4305 ./vsim/install/rtl/perips/apb_spi_master/spi_master_rx.v
497 1583 19049 ./vsim/install/rtl/perips/apb_spi_master/spi_master_controller.v
279 1097 11203 ./vsim/install/rtl/perips/apb_spi_master/apb_spi_master.v
179 882 8092 ./vsim/install/rtl/perips/apb_spi_master/spi_master_apb_if.v
114 740 4922 ./vsim/install/rtl/perips/apb_spi_master/spi_master_fifo.v
75 272 2307 ./vsim/install/rtl/perips/apb_spi_master/spi_master_clkgen.v
59 300 3011 ./vsim/install/rtl/perips/apb_i2c/i2c_master_defines.v
544 2224 20003 ./vsim/install/rtl/perips/apb_i2c/i2c_master_bit_ctrl.v
334 1103 10289 ./vsim/install/rtl/perips/apb_i2c/i2c_master_byte_ctrl.v
199 776 6967 ./vsim/install/rtl/perips/apb_i2c/apb_i2c.v
126 339 3512 ./vsim/install/rtl/perips/sirv_AsyncResetRegVec_1.v
55 190 2132 ./vsim/install/rtl/perips/sirv_LevelGateway.v
165 580 5601 ./vsim/install/rtl/debug/sirv_debug_csr.v
546 1656 19103 ./vsim/install/rtl/debug/sirv_debug_module.v
393 1420 16213 ./vsim/install/rtl/debug/sirv_jtag_dtm.v
209 999 8309 ./vsim/install/rtl/debug/sirv_debug_rom.v
56 169 2145 ./vsim/install/rtl/debug/sirv_debug_ram.v
286 644 10008 ./vsim/install/rtl/soc/e203_soc_top.v
377 601 9353 ./fpga/mcu200t/src/system.v
377 601 9353 ./fpga/ddr200t/src/system.v
356 907 14159 ./rtl/e203/fab/sirv_icb1to2_bus.v
1028 2483 44609 ./rtl/e203/fab/sirv_icb1to16_bus.v
677 1665 28575 ./rtl/e203/fab/sirv_icb1to8_bus.v
94 246 3400 ./rtl/e203/subsys/e203_subsys_clint.v
57 167 2209 ./rtl/e203/subsys/e203_subsys_hclkgen_rstsync.v
2153 5348 77305 ./rtl/e203/subsys/e203_subsys_perips.v
517 1233 17417 ./rtl/e203/subsys/e203_subsys_mems.v
62 211 2452 ./rtl/e203/subsys/e203_subsys_pllclkdiv.v
655 1404 25414 ./rtl/e203/subsys/e203_subsys_top.v
150 355 4732 ./rtl/e203/subsys/e203_subsys_plic.v
53 190 2145 ./rtl/e203/subsys/e203_subsys_pll.v
505 2133 23180 ./rtl/e203/subsys/e203_subsys_nice_core.v
116 328 3693 ./rtl/e203/subsys/e203_subsys_hclkgen.v
109 248 3158 ./rtl/e203/subsys/e203_subsys_gfcm.v
910 2262 35792 ./rtl/e203/subsys/e203_subsys_main.v
87 234 2575 ./rtl/e203/general/sirv_gnrl_ram.v
49 155 1987 ./rtl/e203/general/sirv_gnrl_xchecker.v
167 453 5705 ./rtl/e203/general/sirv_sram_icb_ctrl.v
101 293 3115 ./rtl/e203/general/sirv_sim_ram.v
523 1855 15365 ./rtl/e203/general/sirv_gnrl_bufs.v
109 319 3699 ./rtl/e203/general/sirv_1cyc_sram_ctrl.v
276 636 6294 ./rtl/e203/general/sirv_gnrl_dffs.v
1843 5385 61041 ./rtl/e203/general/sirv_gnrl_icbs.v
344 917 13172 ./rtl/e203/core/e203_dtcm_ctrl.v
117 621 5563 ./rtl/e203/core/e203_ifu_litebpu.v
636 2818 31149 ./rtl/e203/core/e203_exu_alu_muldiv.v
1234 4957 54374 ./rtl/e203/core/e203_exu_decode.v
244 728 9240 ./rtl/e203/core/e203_ifu.v
108 282 3169 ./rtl/e203/core/e203_reset_ctrl.v
115 441 4903 ./rtl/e203/core/e203_exu_wbck.v
129 473 5007 ./rtl/e203/core/e203_exu_regfile.v
785 2230 41575 ./rtl/e203/core/e203_defines.v
52 166 2086 ./rtl/e203/core/e203_extend_csr.v
571 1698 22490 ./rtl/e203/core/e203_itcm_ctrl.v
71 186 2565 ./rtl/e203/core/e203_dtcm_ram.v
53 155 1941 ./rtl/e203/core/e203_clkgate.v
962 2223 32453 ./rtl/e203/core/e203_exu.v
680 3134 26723 ./rtl/e203/core/e203_exu_csr.v
903 2763 35926 ./rtl/e203/core/e203_exu_alu.v
948 2437 40267 ./rtl/e203/core/e203_biu.v
112 237 3241 ./rtl/e203/core/e203_ifu_minidec.v
119 419 4850 ./rtl/e203/core/e203_exu_alu_rglr.v
137 523 5724 ./rtl/e203/core/e203_exu_alu_csrctrl.v
133 579 6101 ./rtl/e203/core/e203_exu_branchslv.v
551 2522 26989 ./rtl/e203/core/e203_exu_excp.v
964 2765 37883 ./rtl/e203/core/e203_lsu_ctrl.v
291 1583 14455 ./rtl/e203/core/e203_exu_disp.v
111 264 3381 ./rtl/e203/core/e203_irq_sync.v
124 449 5112 ./rtl/e203/core/e203_exu_nice.v
127 422 4975 ./rtl/e203/core/e203_exu_alu_bjp.v
348 879 14483 ./rtl/e203/core/e203_lsu.v
154 505 4944 ./rtl/e203/core/e203_clk_ctrl.v
914 2218 36063 ./rtl/e203/core/e203_core.v
100 280 3756 ./rtl/e203/core/config.v
72 184 2584 ./rtl/e203/core/e203_itcm_ram.v
589 1446 20019 ./rtl/e203/core/e203_cpu_top.v
554 2321 22753 ./rtl/e203/core/e203_ifu_ifetch.v
348 857 12641 ./rtl/e203/core/e203_exu_commit.v
532 1416 17291 ./rtl/e203/core/e203_exu_alu_dpath.v
201 645 7702 ./rtl/e203/core/e203_exu_longpwbck.v
896 2077 33341 ./rtl/e203/core/e203_cpu.v
176 649 7182 ./rtl/e203/core/e203_exu_oitf.v
856 4229 39613 ./rtl/e203/core/e203_ifu_ift2icb.v
713 2871 29779 ./rtl/e203/core/e203_exu_alu_lsuagu.v
114 315 3953 ./rtl/e203/core/e203_srams.v
132 433 4421 ./rtl/e203/mems/sirv_mrom.v
67 214 2512 ./rtl/e203/mems/sirv_mrom_top.v
51 170 2266 ./rtl/e203/perips/sirv_ResetCatchAndSync.v
41 130 1754 ./rtl/e203/perips/sirv_aon_porrst.v
999 2784 40346 ./rtl/e203/perips/apb_adv_timer/adv_timer_apb_if.v
63 273 2127 ./rtl/e203/perips/apb_adv_timer/prescaler.v
606 1828 24848 ./rtl/e203/perips/apb_adv_timer/apb_adv_timer.v
154 545 5104 ./rtl/e203/perips/apb_adv_timer/up_down_counter.v
137 455 4160 ./rtl/e203/perips/apb_adv_timer/input_stage.v
153 504 5241 ./rtl/e203/perips/apb_adv_timer/comparator.v
71 265 2274 ./rtl/e203/perips/apb_adv_timer/timer_cntrl.v
227 699 7982 ./rtl/e203/perips/apb_adv_timer/timer_module.v
495 1559 15078 ./rtl/e203/perips/sirv_qspi_media.v
115 281 3975 ./rtl/e203/perips/sirv_plic_top.v
681 2422 21963 ./rtl/e203/perips/sirv_pmu_core.v
472 1622 15411 ./rtl/e203/perips/sirv_spi_flashmap.v
735 2480 19315 ./rtl/e203/perips/sirv_qspi_physical.v
513 1697 16665 ./rtl/e203/perips/sirv_tlfragmenter_qspi_1.v
522 2340 24865 ./rtl/e203/perips/sirv_plic_man.v
552 1655 25268 ./rtl/e203/perips/sirv_pmu.v
44 139 1803 ./rtl/e203/perips/sirv_AsyncResetRegVec.v
487 1184 18959 ./rtl/e203/perips/sirv_aon_top.v
467 1567 15739 ./rtl/e203/perips/sirv_tlwidthwidget_qspi.v
216 678 6713 ./rtl/e203/perips/apb_uart/uart_rx.v
192 574 5872 ./rtl/e203/perips/apb_uart/uart_tx.v
113 540 4361 ./rtl/e203/perips/apb_uart/io_generic_fifo.v
299 1173 12578 ./rtl/e203/perips/apb_uart/apb_uart.v
89 324 2969 ./rtl/e203/perips/apb_uart/uart_interrupt.v
69 217 2840 ./rtl/e203/perips/sirv_aon_lclkgen_regs.v
228 800 7172 ./rtl/e203/perips/sirv_qspi_arbiter.v
222 904 9789 ./rtl/e203/perips/apb_gpio/apb_gpio.v
84 243 2758 ./rtl/e203/perips/sirv_expl_axi_slv.v
426 1059 9927 ./rtl/e203/perips/sirv_AsyncResetRegVec_129.v
167 589 5423 ./rtl/e203/perips/sirv_tl_repeater_5.v
141 547 6194 ./rtl/e203/perips/sirv_hclkgen_regs.v
43 165 1822 ./rtl/e203/perips/sirv_DeglitchShiftRegister.v
388 1191 15163 ./rtl/e203/perips/sirv_aon_wrapper.v
554 1234 24436 ./rtl/e203/perips/sirv_flash_qspi_top.v
229 751 7132 ./rtl/e203/perips/sirv_qspi_fifo.v
168 584 5379 ./rtl/e203/perips/sirv_repeater_6.v
4014 14533 115829 ./rtl/e203/perips/sirv_flash_qspi.v
6920 27632 208013 ./rtl/e203/perips/sirv_aon.v
93 295 3590 ./rtl/e203/perips/sirv_jtaggpioport.v
165 563 5717 ./rtl/e203/perips/sirv_rtc.v
132 460 4020 ./rtl/e203/perips/sirv_queue_1.v
349 1076 11023 ./rtl/e203/perips/sirv_wdog.v
661 2450 19214 ./rtl/e203/perips/sirv_clint.v
86 243 2681 ./rtl/e203/perips/sirv_AsyncResetRegVec_36.v
171 562 6099 ./rtl/e203/perips/sirv_queue.v
51 170 2274 ./rtl/e203/perips/sirv_ResetCatchAndSync_2.v
156 465 7226 ./rtl/e203/perips/sirv_clint_top.v
38 126 1729 ./rtl/e203/perips/sirv_AsyncResetReg.v
128 440 4157 ./rtl/e203/perips/apb_spi_master/spi_master_tx.v
132 456 4305 ./rtl/e203/perips/apb_spi_master/spi_master_rx.v
497 1583 19049 ./rtl/e203/perips/apb_spi_master/spi_master_controller.v
279 1097 11203 ./rtl/e203/perips/apb_spi_master/apb_spi_master.v
179 882 8092 ./rtl/e203/perips/apb_spi_master/spi_master_apb_if.v
114 740 4922 ./rtl/e203/perips/apb_spi_master/spi_master_fifo.v
75 272 2307 ./rtl/e203/perips/apb_spi_master/spi_master_clkgen.v
59 300 3011 ./rtl/e203/perips/apb_i2c/i2c_master_defines.v
544 2224 20003 ./rtl/e203/perips/apb_i2c/i2c_master_bit_ctrl.v
334 1103 10289 ./rtl/e203/perips/apb_i2c/i2c_master_byte_ctrl.v
199 776 6967 ./rtl/e203/perips/apb_i2c/apb_i2c.v
126 339 3512 ./rtl/e203/perips/sirv_AsyncResetRegVec_1.v
55 190 2132 ./rtl/e203/perips/sirv_LevelGateway.v
165 580 5601 ./rtl/e203/debug/sirv_debug_csr.v
546 1656 19103 ./rtl/e203/debug/sirv_debug_module.v
393 1420 16213 ./rtl/e203/debug/sirv_jtag_dtm.v
209 999 8309 ./rtl/e203/debug/sirv_debug_rom.v
56 169 2145 ./rtl/e203/debug/sirv_debug_ram.v
286 644 10008 ./rtl/e203/soc/e203_soc_top.v
114291 376396 4143113 total
----这个项目是一个完整的RISC-V MCU for IoT的项目，有多达286个verilog源文件11万行源代码(即使考虑未剔除空行和注释代码量也是相当可观)，所有.v文件的解读显然不是文章标题所说的零门槛，但项目仍然通过Makefile支持iverilog的一键式仿真，这个一键式仿真就是本系列标题所说的零门槛，代表的是对开源RISC-V项目的"体验"----仿真运行看到RISC-V RTL的逻辑功能效果。
----尝试通过gtkwave查看波形的软件，看看这个RTL的模块hierarchy。如下所示。
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "*.vcd"
./vsim/run/rv32ui-p-add/tb_top.vcd
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ find . -name "*.vcd" | xargs ls -l
-rw-rw-r-- 1 chipcamp chipcamp 6248329 Oct 7 16:13 ./vsim/run/rv32ui-p-add/tb_top.vcd
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$ gtkwave ./vsim/run/rv32ui-p-add/tb_top.vcd &
1 29950
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$
GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
LXTLOAD | 24198 facilities
LXTLOAD | Read 5 block headers OK
LXTLOAD | 0 start time
LXTLOAD | 103346 end time
LXTLOAD |
LXTLOAD | Finished building 24198 facs.
LXTLOAD | Merging in 6651 aliases.
LXTLOAD | Building facility hierarchy tree.
LXTLOAD | Sorting facility hierarchy tree.
chipcamp@chipcamp:~/src/riscv/e203_hbirdv2$
----RTL的Hierarchy欣赏！！！
----最顶层的tb_top的两个信号clk和rst_n，其中rst_n在第120sec翻转。
<<<<<<<<END完>>>>>>>>
关键词：e203，蜂鸟，RTL-hierarchy, iverilog, verilator。
摘要：本文记录了开源RISC-V项目蜂鸟e203的仿真运行过程。该项目的verilog源文件有200多个11万多行，但它也通过Makefile提供了iverilog仿真脚本，通过make命令即可运行iverilog对200多个verilog文件组成的复杂的RTL项目进行功能仿真。对于这种复杂的RTL项目，本文还记录了一个使用gtkwave查看波形软件来查看和鉴赏RTL-hierarchy的小小灵感。