[HDLBits] Exams/2014 q4b

向盟约宣誓2023-09-25 13:25

Consider the n-bit shift register circuit shown below:

Write a top-level Verilog module (named top_module) for the shift register, assuming that n = 4. Instantiate four copies of your MUXDFF subcircuit in your top-level module. Assume that you are going to implement the circuit on the DE2 board.

Connect the R inputs to the SW switches,
clk to KEY[0],
E to KEY[1],
L to KEY[2], and
w to KEY[3].
Connect the outputs to the red lights LEDR[3:0].

(Reuse your MUXDFF from exams/2014_q4a.)

复制代码

module top_module (
    input [3:0] SW,
    input [3:0] KEY,
    output [3:0] LEDR
); //
    MUXDFF d3(SW[3],KEY[3],KEY[1],KEY[2],KEY[0],LEDR[3]);
    MUXDFF d2(SW[2],LEDR[3],KEY[1],KEY[2],KEY[0],LEDR[2]);
    MUXDFF d1(SW[1],LEDR[2],KEY[1],KEY[2],KEY[0],LEDR[1]);
    MUXDFF d0(SW[0],LEDR[1],KEY[1],KEY[2],KEY[0],LEDR[0]);
endmodule

module MUXDFF (
	input r,w,e,l,
    input clk,
    output q);
	wire d;
    assign d=(l?r:(e?w:q));
    always@(posedge clk) begin
        q<=d;
    end
endmodule