1，ELR寄存器（Exception Link Register ）
The Exception Link Register holds the exception return address。
异常链接寄存器保存异常返回地址。最常用也很重要。
2，SPSR（Saved Process Status Register）
当获取异常时，处理器状态存储在相关的Saved Program Status中寄存器(SPSR)，与ARMv7中的CPSR类似。SPSR保存PSTATE的值在执行一个异常时，用于恢复PSTATE的值异常返回。
The individual bits represent the following values for AArch64:
- N Negative result (N flag).
- Z Zero result (Z) flag.
- C Carry out (C flag).
- V Overflow (V flag).
- SS Software Step. Indicates whether software step was enabled when an
exception was taken. - IL Illegal Execution State bit. Shows the value of PSTATE.IL
immediately before the exception was taken. - D Process state Debug mask. Indicates whether debug exceptions from
watchpoint, breakpoint, and software step debug events that are
targeted at the Exception level the exception occurred in were masked
or not. - A SError (System Error) mask bit.
- I IRQ mask bit.
- F FIQ mask bit.
- M4 Execution state that the exception was taken from. A value of 0
indicates AArch64. - M3:0 Mode or Exception level that an exception was taken from.
在ARMv8中，写入的SPSR依赖于Exception级别。如果在EL1中采取异常，则使用SPSR_EL1。如果在EL2中采用异常，则使用SPSR_EL2在EL3中采用异常，则使用SPSR_EL3。当取an时，核心填充SPSR
例外。
注意：
与异常级别相关联的寄存器对ELR_ELn和SPSR_ELn保留它们在较低的Exception级别执行期间的状态