1 Pinctrl引入
参考资料
- Linux 5.x内核文档
- Documentation\devicetree\bindings\pinctrl\pinctrl-bindings.txt
- Linux 4.x内核文档
- Documentation\pinctrl.txt
- Documentation\devicetree\bindings\pinctrl\pinctrl-bindings.txt
1.1 Pinctrl作用
无论是哪种芯片,都有类似下图的结构

- 想要pinA、B用于GPIO,需要设置IOMUX让它们连接到GPIO模块;
- 要想pinA、B用于I2C,需要设置IOMUX让它们连接到I2C模块;
- 要想pinA、B用于UART,需要设置IOMUX让它们连接到UART模块;
需要选择哪一个功能这就是pinctrl子系统需要做的事(所以,简单理解,pinctrl其实就是IOMUX复用寄存器)。
这里GPIO、I2C是并列的关系,它们能够使用之前,需要设置复用关系IOMUX,有时还要配置引脚,比如上拉、下拉、开漏等等。现在芯片一般动辄上百或几百个引脚,在使用到GPIO、I2C等功能时,若一个引脚一个引脚去找对应的寄存器进行配置非常浪费时间和精力,所以内核引入了Pinctrl子系统,把引脚的复用和配置抽象出来,只需要芯片厂商把自家芯片的支持进去,就可以很方便的配置引脚。
1.2 什么是GPIO子系统
GPIO子系统是Linux内核的一个组成部分,用于管理通用输入/输入引脚。它提供了一种标准化且统一的接口,使用户程序和驱动程序能够与硬件上的GPIO进行交互。
它的功能包括:
①:引脚控制(输入输出,电气属性配置)
②:值的读取以及写入,读取或者输出引脚的值
③:中断支持配置引脚触发中断。
1.3 pinctrl子系统和GPIO子系统的关系
pinctrl子系统是GPIO子系统的底层基础,使用pinctrl将引脚设置为GPIO功能,再由GPIO子系统进行通用输入输出配置。
1.4 如何使用pinctrl子系统和GPIO子系统
从设备树开始学习Pinctrl会比较容易。参考内核Documentation\devicetree\bindings\pinctrl\pinctrl-bindings.txt,Pinctrl子系统涉及2个对象:Pin controller devices、Pinctrl client devices。
- Pin controller devices:提供服务,可以用它来复用引脚、配置引脚,是一个软件上的概念。
注意:Pin controller和GPIO Controller不同,前者控制的引脚可用于GPIO功能、I2C功能;后者只是把引脚配置为输入、输出等简单的功能。两者的关系是先用Pin controller把引脚配置为GPIO,再用GPIO Controler把引脚配置为输入或输出。 - Pinctrl client devices:使用服务,Pinctrl系统的客户,即使用Pinctrl系统的设备。声明自己要使用哪些引脚的哪些功能,怎么配置它们。
在设备树中,上述两个对象被定义成两个节点,如下图所示。左边是Pin controller节点,右边是client device节点:

- Pin state:对于一个client device来说,比如他是一个UART设备,它有多个"状态":default、sleep等,那对应的引脚也有这些状态。比如默认状态下,UART设备是工作的,那么所用的引脚就要复用为UART功能。在休眠状态下,为了省电,可以把这些引脚复用为GPIO功能,或者直接把它们配置输出高电平。上图中,pinctrl-names属性里定义了2种状态:default、sleep。
- 第0种状态用到的引脚在pinctrl-0中定义,它是state_0_node_a,位于Pincontroller节点中。 第1种状态用到的引脚在pinctrl-1中定义,它是state_1_node_a,位于pincontroller节点中。
- 当这个设备处于default状态时,pinctrl子系统会自动根据上述信息把所用引脚复用为uart0功能。
- 当这个设备处于sleep状态时,pinctrl子系统会自动根据上述信息把所用引脚配置为高电平
groups、function和pins :一个设备会用到一个或多个引脚pin ,这些引脚就可以归为一组group ,复用为某个功能function;当然:一个设备可以用到多组引脚,比如A1、A2两组引脚,A1组复用为F1功能,A2组复用为F2功能。

c. pin multiplexing node和pin configuration node :在上图Pin controller节点中,有子节点或孙节点,它们是给client device使用的。
可以用来描述复用信息:哪组(group)引脚复用为哪个功能(function);
可以用来描述配置信息:哪组(group)引脚配置为哪个设置功能(setting),比如上拉、下拉等。
注意:Pin controller节点的格式,没有统一的标准!!!!每家芯片都不一样,甚至上面的group、function关键字也不一定有,但是概念是有的。而client device节点的格式是统一的。
2. Pinctrl子系统主要数据结构
参考资料
- pin_controller数据结构
- drivers\pinctrl\core.h
- include\linux\pinctrl\pinctrl.h
- include\linux\pinctrl\pinmux.h
- include\linux\pinctrl\pinconf.h
- client数据结构
- drivers\pinctrl\core.h
- include\linux\pinctrl\devinfo.h
- include\linux\device.h
- include\linux\pinctrl\machine.h
2.1 设备树模型

2.1 应用示例
实例:(NXP官方提供了一个能够根据选项自动生成设备树文件的软件)
打开nxp芯片设备树配置软件

这里需要点灯选择GPIO5_3将它路由至下面功能,标红的表示不能使用该功能。

将代码复制下来

然后去设备树中寻找这个节点(&iomux_snv),将复制的内容添加进去。


然后在设备树中加入自己的led节点,首先设置compatible属性方便与驱动匹配之后配置默认状态default之后去服务端找这个节点,看到是设置成GPIO5_3了,然后设备对应的GPIO,有效电平为低电平

三.代码
应用程序:ledtest.c
cpp
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stdio.h>
#include <string.h>
#include <unistd.h>
//ledtest /dev/myled on
//ledtest /dev/myled off
int main(int argc, char * argv[])
{
int fd;
char status = 0;
if(argc != 3)
{
printf("Usag:%s <dev> <on|off>\n", argv[0]);
printf("eg:%s <dev> <on|off>\n", argv[0]);
printf("eg:%s <dev> <on|off>\n", argv[0]);
}
//open
fd = open(argv[1], O_RDWR);
if(fd < 0)
{
printf("can not open %s\n", argv[0]);
}
//write
if(strcmp(argv[2], "on") == 0)
{
status = 1;
}
write(fd, &status, 1);
return 0;
}
驱动程序:led_drv.c
cpp
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/fs.h>
#include <linux/errno.h>
#include <linux/miscdevice.h>
#include <linux/kernel.h>
#include <linux/major.h>
#include <linux/mutex.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/stat.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/tty.h>
#include <linux/kmod.h>
#include <linux/gfp.h>
#include <linux/gpio/consumer.h>
#include <linux/of.h>
//1.确定主设备号
static int major;
static struct class *led_class;
static struct gpio_desc *led_gpio;
/*3.实现open/write函数,填入file_operations结构体*/
/*
struct file *file:表示打开设备文件后返回的文件指针。
const char __user *buf:表示用户空间缓冲区的起始地址,数据从这里传递到内核空间。
size_t size:表示需要写入的数据大小。
loff_t *ppos:表示文件内的当前偏移量。
*/
static ssize_t led_write (struct file *file, const char __user *buf, size_t size, loff_t *ppos)
{
char val;
int err;
err = copy_from_user(&val, buf, 1);
gpiod_direction_output(led_gpio, val);
return 0;
}
static int led_open (struct inode *inode , struct file *file)//这里的open作用是配置时钟并使能,配置成GPIO并让GPIO为输出模式,
{
gpiod_direction_output(led_gpio, 0);
return 0;
}
/*2.定义自己的file_operations结构体*/
static const struct file_operations led_drv= {
.owner = THIS_MODULE,
.open = led_open,
.write = led_write,
};
static int chip_demo_gpio_probe(struct platform_device *pdev)
{
led_gpio = gpiod_get(&pdev->dev, "led", 0);//从设备树中或平台数据中获取指定名称的GPIO
if (IS_ERR(led_gpio)) {
dev_err(&pdev->dev, "Failed to get GPIO for led\n");
return PTR_ERR(led_gpio);
}
major = register_chrdev(major, "my_led", &led_drv);
led_class = class_create(THIS_MODULE, "led_class");
if (IS_ERR(led_class)) {
printk("%s %s line %d\n", __FILE__, __FUNCTION__, __LINE__);
unregister_chrdev(major, "led");
gpiod_put(led_gpio);
return PTR_ERR(led_class);
}
device_create(led_class,NULL, MKDEV(major, 0), NULL, "my_led0");
return 0;
}
static int chip_demo_gpio_remove(struct platform_device *dev)
{
device_destroy(led_class, MKDEV(major, 0));
class_destroy(led_class);
unregister_chrdev(major, "100ask_led");
gpiod_put(led_gpio);//释放GPIO
return 0;
}
static struct of_device_id ask100_leds[] = {
{.compatible = "100ask,leddrv"},
};
/* 1. 定义platform_driver */
static struct platform_driver chip_demo_gpio_driver = {
.probe = chip_demo_gpio_probe,
.remove = chip_demo_gpio_remove,
.driver = {
.name = "100ask_led",
.of_match_table = ask100_leds,
},
};
/*5.入口函数和出口函数编写*/
static int led_init(void)
{
platform_driver_register(&chip_demo_gpio_driver);
return 0;
}
static void led_exit(void)
{
platform_driver_unregister(&chip_demo_gpio_driver);
}
/*4.把入口函数和出口函数告诉内核*/
module_init(led_init);//告诉内核这个函数是入口函数
module_exit(led_exit);//告诉内核这个函数是出口函数
MODULE_LICENSE ("GPL");//声明GPL协议,遵循开源协议,要不然可能开源协议不通过
Makefile:
cpp
# 1. 使用不同的开发板内核时, 一定要修改KERN_DIR
# 2. KERN_DIR中的内核要事先配置、编译, 为了能编译内核, 要先设置下列环境变量:
# 2.1 ARCH, 比如: export ARCH=arm64
# 2.2 CROSS_COMPILE, 比如: export CROSS_COMPILE=aarch64-linux-gnu-
# 2.3 PATH, 比如: export PATH=$PATH:/home/book/100ask_roc-rk3399-pc/ToolChain-6.3.1/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
# 注意: 不同的开发板不同的编译器上述3个环境变量不一定相同,
# 请参考各开发板的高级用户使用手册
KERN_DIR = /home/book/100ask_imx6ull-sdk/Linux-4.9.88# 板子所用内核源码的目录
all:
make -C $(KERN_DIR) M=`pwd` modules
$(CROSS_COMPILE)gcc -o ledtest ledtest.c
clean:
make -C $(KERN_DIR) M=`pwd` modules clean
rm -rf modules.order
rm -f ledtest
# 参考内核源码drivers/char/ipmi/Makefile
# 要想把a.c, b.c编译成ab.ko, 可以这样指定:
# ab-y := a.o b.o
# obj-m += ab.o
obj-m += led_drv.o
设备树文件,这个是完整的设备树源码,我们只需关注我们自己添加的那部分
cpp
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx6ull.dtsi"
/ {
model = "Freescale i.MX6 ULL 14x14 EVK Board";
compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
chosen {
stdout-path = &uart1;
};
memory {
reg = <0x80000000 0x20000000>;
};
myled{
compatible = "100ask,leddrv";
pinctrl-names = "default";
pinctrl-0 = <&myled_for_gpio_subsys>;
led-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x14000000>;
linux,cma-default;
};
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 1000>;
brightness-levels = <0 1 2 3 4 5 6 8 10>;
default-brightness-level = <8>;
status = "okay";
};
pxp_v4l2 {
compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
status = "okay";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_can_3v3: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "can-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_usb_ltemodule: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "ltemodule-pwr";
regulator-min-microvolt = <3800000>;
regulator-max-microvolt = <3800000>;
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-boot-on;
};
reg_gpio_wifi: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "wifi-pwr";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
status = "disabled";
led0: cpu {
label = "cpu";
gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
user1 {
label = "User1 Button";
gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
linux,code = <KEY_1>;
};
user2 {
label = "User2 Button";
gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
linux,code = <KEY_2>;
};
};
sound {
compatible = "fsl,imx6ul-evk-wm8960",
"fsl,imx-audio-wm8960";
model = "wm8960-audio";
cpu-dai = <&sai2>;
audio-codec = <&codec>;
asrc-controller = <&asrc>;
codec-master;
gpr = <&gpr 4 0x100000 0x100000>;
hp-det = <3 0>;
/*hp-det-gpios = <&gpio5 4 0>;
mic-det-gpios = <&gpio5 4 0>;*/
audio-routing =
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"Ext Spk", "SPK_LP",
"Ext Spk", "SPK_LN",
"Ext Spk", "SPK_RP",
"Ext Spk", "SPK_RN",
"LINPUT2", "Mic Jack",
"LINPUT3", "Mic Jack",
"RINPUT1", "Main MIC",
"RINPUT2", "Main MIC",
"Mic Jack", "MICB",
"Main MIC", "MICB",
"CPU-Playback", "ASRC-Playback",
"Playback", "CPU-Playback",
"ASRC-Capture", "CPU-Capture",
"CPU-Capture", "Capture";
status = "okay";
};
spi4 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4>;
pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
status = "okay";
gpio-sck = <&gpio5 11 0>;
gpio-mosi = <&gpio5 10 0>;
cs-gpios = <&gpio5 7 0>;
num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
gpio_spi: gpio_spi@0 {
compatible = "fairchild,74hc595";
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
registers-number = <1>;
registers-default = /bits/ 8 <0x57>;
spi-max-frequency = <10000>;
};
};
sii902x_reset: sii902x-reset {
compatible = "gpio-reset";
reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>;
reset-delay-us = <100000>;
#reset-cells = <0>;
status = "okay";
};
};
&gpmi{
status = "disabled";
};
&cpu0 {
arm-supply = <®_arm>;
soc-supply = <®_soc>;
};
&clks {
assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <786432000>;
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-handle = <ðphy0>;
phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
phy-reset-duration = <26>;
status = "okay";
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rmii";
phy-handle = <ðphy1>;
phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
phy-reset-duration = <26>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
smsc,disable-energy-detect;
reg = <0>;
};
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
smsc,disable-energy-detect;
reg = <1>;
};
};
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <®_can_3v3>;
status = "okay";
};
&gpc {
fsl,cpu_pupscr_sw2iso = <0x1>;
fsl,cpu_pupscr_sw = <0x0>;
fsl,cpu_pdnscr_iso2sw = <0x1>;
fsl,cpu_pdnscr_iso = <0x1>;
fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c2 {
clock_frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
codec: wm8960@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&clks IMX6UL_CLK_SAI2>;
clock-names = "mclk";
wlf,shared-lrclk;
};
sii902x: sii902x@39 {
compatible = "SiI,sii902x";
pinctrl-names = "default";
reset-names="sii902x";
pinctrl-0 = <&pinctrl_sii902x>;
resets = <&sii902x_reset>;
interrupt-parent = <&gpio1>;
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
mode_str ="1280x720M@60";
bits-per-pixel = <16>;
reg = <0x39>;
status = "okay";
};
gt9xx@5d {
compatible = "goodix,gt9xx";
reg = <0x5d>;
status = "okay";
interrupt-parent = <&gpio1>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tsc_reset &pinctrl_touchscreen_int>;
/*pinctrl-1 = <&pinctrl_tsc_irq>;*/
/*pinctrl-names = "default", "int-output-low", "int-output-high", "int-input";
pinctrl-0 = <&ts_int_default>;
pinctrl-1 = <&ts_int_output_low>;
pinctrl-2 = <&ts_int_output_high>;
pinctrl-3 = <&ts_int_input>;
*/
reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpio1 5 IRQ_TYPE_EDGE_FALLING>;
irq-flags = <2>; /*1:rising 2: falling*/
touchscreen-max-id = <5>;
touchscreen-size-x = <800>;
touchscreen-size-y = <480>;
touchscreen-max-w = <1024>;
touchscreen-max-p = <1024>;
/*touchscreen-key-map = <172>, <158>;*/ /*KEY_HOMEPAGE, KEY_BACK*/
goodix,type-a-report = <0>;
goodix,driver-send-cfg = <0>;
goodix,create-wr-node = <1>;
goodix,wakeup-with-reset = <0>;
goodix,resume-in-workqueue = <0>;
goodix,int-sync = <0>;
goodix,swap-x2y = <0>;
goodix,esd-protect = <0>;
goodix,pen-suppress-finger = <0>;
goodix,auto-update = <0>;
goodix,auto-update-cfg = <0>;
goodix,power-off-sleep = <0>;
/*7*/
goodix,cfg-group0 = [
6b 00 04 58 02 05 0d 00 01 0f
28 0f 50 32 03 05 00 00 00 00
00 00 00 00 00 00 00 8a 2a 0c
45 47 0c 08 00 00 00 40 03 2c
00 01 00 00 00 03 64 32 00 00
00 28 64 94 d5 02 07 00 00 04
95 2c 00 8b 34 00 82 3f 00 7d
4c 00 7a 5b 00 7a 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 18 16 14 12 10 0e 0c 0a
08 06 04 02 ff ff 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 16 18 1c 1d 1e 1f 20 21
22 24 13 12 10 0f 0a 08 06 04
02 00 ff ff ff ff ff ff 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 79 01
];
/*4.3*/
goodix,cfg-group1 = [
97 E0 01 10 01 05 0D 00 01 00
00 05 5A 46 53 11 00 00 11 11
14 14 14 22 0A 04 00 00 00 00
00 00 53 00 14 00 00 84 00 00
3C 00 00 64 1E 28 87 27 08 32
34 05 0D 20 33 60 11 02 24 00
00 64 80 80 14 02 00 00 54 89
68 85 6D 82 72 80 76 7D 7B 7B
00 00 00 00 00 00 00 F0 50 3C
FF FF 07 00 00 00 02 14 14 03
04 00 21 64 0A 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
32 20 50 3C 3C 00 00 00 00 00
0D 06 0C 05 0B 04 0A 03 FF FF
FF FF FF FF 00 01 02 03 04 05
06 07 08 09 0A 0B 0C 0D FF FF
FF FF FF FF FF FF FF FF FF FF
00 00 00 00 00 00 00 00 00 00
00 00 00 00 3C 00 05 1E 00 02
2A 1E 19 14 02 00 03 0A 05 00
00 00 00 00 00 00 01 FF FF 86
22 03 00 00 33 00 0F 00 00 00
50 3C 50 00 00 00 00 2A 01
];
/*5*/
goodix,cfg-group2 = [
00 20 03 E0 01 05 3C 00 01 08
28 0C 50 32 03 05 00 00 00 00
00 00 00 17 19 1E 14 8B 2B 0D
33 35 0C 08 00 00 00 9A 03 11
00 01 00 00 00 00 00 32 00 00
00 20 58 94 C5 02 00 00 00 04
B0 23 00 93 2B 00 7B 35 00 69
41 00 5B 4F 00 5B 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 02 04 06 08 0A 0C 0E 10
12 14 16 18 1A FF 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 02 04 06 08 0A 0C 0F
10 12 13 16 18 1C 1D 1E 1F 20
21 22 24 26 FF FF FF FF 00 00
00 FF FF FF FF FF FF FF FF FF
FF FF FF FF 48 01
];
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_1>;
imx6ul-evk {
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 /* USB OTG1 ID */
// MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x000010B0
MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x000110A0
>;
};
pinctrl_sii902x: hdmigrp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x59
>;
};
pinctrl_touchscreen_int: lcdif_tsc_int {
fsl,pins = <
MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x000010B0
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
>;
};
pinctrl_flexcan1: flexcan1grp{
fsl,pins = <
MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x000010B0
MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x000010B0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
>;
};
pinctrl_ecspi3: ecspi3 {
fsl,pins = <
MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x000010B0
MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x000010B0
MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x000010B0
//MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x000010B0
MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x000010B0
MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x000010B0
>;
};
pinctrl_ecspi1: ecspi1 {
fsl,pins = <
MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x000010B0
MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x000010B0
MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x000010B0
MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x000010B0
MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x000010B0
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
>;
};
pinctrl_uart6: uart6grp {
fsl,pins = <
MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1
MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1
>;
};
pinctrl_sai2: sai2grp {
fsl,pins = <
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
>;
};
pinctrl_tsc: tscgrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
>;
};
pinctrl_usdhc2_8bit: usdhc2grp_8bit {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
>;
};
pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
>;
};
pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
>;
};
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
>;
};
pinctrl_lcdif_dat_16bits: lcdifdatgrp_16bits {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
>;
};
pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
>;
};
pinctrl_lcdif_reset: lcdifresetgrp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x1b0b0
>;
};
pinctrl_adc1: adc1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x000010B1
MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x000010B1
>;
};
};
};
&iomuxc_snvs {
pinctrl-names = "default_snvs";
pinctrl-0 = <&pinctrl_hog_2>;
myled_for_gpio_subsys: BOARD_InitPinsSnvsGrp { /*!< Function assigned for the core: Cortex-A7[ca7] */
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x000110A0
>;
};
imx6ul-evk {
pinctrl_hog_2: hoggrp-2 {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 /* enet1 reset */
MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x1b0b0 /* enet2 reset */
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x000110A0 /*key 1*/
>;
};
pinctrl_tsc_reset: tscresetgrp { /*!< Function assigned for the core: Cortex-A7[ca7] */
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x000110A0
>;
};
pinctrl_spi4: spi4grp {
fsl,pins = <
MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
>;
};
pinctrl_leds: ledgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x000110A0
>;
};
pinctrl_485_ctl: uart3_rs485 {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0
>;
};
};
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl
&pinctrl_lcdif_reset>;
display = <&display0>;
status = "okay";
reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 100ask */
display0: display {
bits-per-pixel = <24>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0_1024x768 {
clock-frequency = <50000000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <160>;
hback-porch = <140>;
hsync-len = <20>;
vback-porch = <20>;
vfront-porch = <12>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pxp {
status = "okay";
};
&ecspi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3>;
cs-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
status = "okay";
spidev: icm20608@0{
compatible = "invensense,icm20608";
interrupt-parent = <&gpio1>;
interrupts = <1 1>;
spi-max-frequency = <8000000>;
reg = <0>;
};
};
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
<&clks IMX6UL_CLK_SAI2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>, <12288000>;
status = "okay";
};
&tsc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tsc>;
xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
measure-delay-time = <0xfffff>;
pre-charge-time = <0xffff>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3
&pinctrl_485_ctl>;
//pinctrl-0 = <&pinctrl_uart3>;
//fsl,rs485-gpio-txen = <&gpio5 0 GPIO_ACTIVE_HIGH>;
//rts-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
//rs485-rts-active-high;
rs485-rx-during-tx;
rs485-rts-delay = <100 100>;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
status = "okay";
};
&usbotg1 {
dr_mode = "otg";
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usbotg2 {
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usbphy1 {
tx-d-cal = <0x5>;
};
&usbphy2 {
tx-d-cal = <0x5>;
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
keep-power-in-suspend;
enable-sdio-wakeup;
bus-width = <4>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_8bit>;
bus-width = <8>;
non-removable;
status = "okay";
};
&wdog1 {
status = "okay";
};
&adc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc1>;
num-channels = <5>;
vref-supply = <®_can_3v3>;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>, <&gpio4 24 GPIO_ACTIVE_LOW>;
status = "okay";
/*
spidev0: spi@0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <5000000>;
};
spidev1: spi@1 {
compatible = "rohm,dh2228fv";
reg = <1>;
spi-max-frequency = <5000000>;
};
*/
};
3 总结
在设备树中GPIO和pinctrl的信息只是用来描述引脚映射关系的 ,也就是说,pinctrl代替了我们之前所用的IMUX这个复用寄存器,它中是选出IO的复用于哪一个功能,不进行具体的操作,具体的IO操作和引脚复用选择需要在驱动程序或应用程序中调用GPIO子系统和pinctrl提供的API来实现。