ARM：使用F103纯汇编点灯

0 上节

ARM体系结构解析：PC寄存器机制、三级流水线与C/汇编交互全揭秘-CSDN博客

1 纯汇编点灯

主要是通过汇编代码实现下图逻辑：

汇编代码实现：

                                PRESERVE8
                                THUMB
                
; Vevtor Table Mapped to Address 0 at Reset
                                AREA         RESET, DATA, READONLY
                                EXPORT        __Vectors
                                        
__Vectors                DCD                0
                                DCD                Reset_Handler                                ; Reset Handle
                                        
                                AREA        |.text|, CODE, READONLY
                                        
;Reset handler
Reset_Handler        PROC
                                EXPORT Reset_Handler                                [WEAK]
                                        
                                ; enable GPIOB
                                LDR R0, =(0x40021000 + 0x18)
                                LDR R1, [R0]
                                ORR R1, R1, #(1<<3)
                                STR R1, [R0]
                                
                                ; set GPIOB as output
                                LDR R0, =(0x40010C00 + 0x00)
                                LDR R1, [R0]
                                ORR R1, R1, #(1<<0)
                                STR R1, [R0]
                                
                                LDR R2, =(0x40010C00 + 0x0C)                        
loop                        
                                ; set GPIOB0 output high
                                LDR R1, [R2]
                                ORR R1, R1, #(1<<0)
                                STR R1, [R2]
                                
                                LDR R0, =0x100000        ; Delay
                                BL delay
                                
                                ; set GPIOB0 output low
                                LDR R1, [R2]
                                BIC R1, R1, #(1<<0)
                                STR R1, [R2]
                                
                                LDR R0, =0x100000        ; Delay
                                BL delay
        
delay
                                SUBS R0, R0,#1  ; R0--
                                BNE delay                 ; cmp R0,0
                                MOV PC, LR                 ; return
                                
                                b loop
                                
                                ENDP
                                        
                                 END