VSCode Verilog环境搭建
- 下载Iverilog
- 安装Iverilog
- 验证安装
- [VS Code安装插件](#VS Code安装插件)
下载Iverilog
安装Iverilog
一定要勾选这两项
建议勾选这两项
验证安装
- 运行Windows PowerShell
- 输入命令:iverilog
- 输入命令:Get-Command gtkwave
VS Code安装插件
- 搜索安装:Verilog-HDL插件
- 搜索安装:Digital IDE插件

创建counter.v文件
c
module counter(
input clk, // 27MHz
output [5:0] led
);
parameter DELAY_MAX = 13_500_000;
reg [$clog2(DELAY_MAX+1)-1 : 0] delay_cnt=0;
reg [5:0] led_reg = 0;
always @(posedge clk) begin
if (delay_cnt == DELAY_MAX-1) begin
delay_cnt <= 0;
end
else begin
delay_cnt <= delay_cnt + 1'b1;
end
end
always @(posedge clk) begin
if (delay_cnt == DELAY_MAX -1) begin
led_reg <= led_reg + 1'b1;
end
end
assign led = ~led_reg;
endmodule //moduleName
创建counter_tb.v (testbeanch测试实例)
c
`timescale 1ns/1ns
module testbench();
reg clk;
wire [5:0] led;
always # 1 clk=~clk;
initial begin
clk = 0;
end
initial begin
$dumpfile("wave.vcd");
$dumpvars(0, testbench);
#6000 $finish;
end
counter #(.DELAY_MAX(5)) u_counter(
.clk(clk),
.led(led)
);
endmodule
使用iverilog编译器将Verilog代码和测试文件编译成VVP文件:
- 命令行执行:iverilog -o "test_tb.vvp" .\counter_tb.v .\counter.v
在命令行中运行生成的VVP文件,生成VCD波形文件:
- vvp test_tb.vvp
使用GTKwave打开生成的VCD文件,查看仿真波形:
- gtkwave.exe -L .\wave.vcd