Lemmings2

See also: Lemmings1.

In addition to walking left and right, Lemmings will fall (and presumably go "aaah!") if the ground disappears underneath them.

In addition to walking left and right and changing direction when bumped, when ground=0, the Lemming will fall and say "aaah!". When the ground reappears (ground=1), the Lemming will resume walking in the same direction as before the fall. Being bumped while falling does not affect the walking direction, and being bumped in the same cycle as ground disappears (but not yet falling), or when the ground reappears while still falling, also does not affect the walking direction.

Build a finite state machine that models this behaviour.

clkbump_leftbump_rightgroundwalk_leftwalk_rightaaah

See also: Lemmings3 and Lemmings4.

复制代码
module top_module(
    input clk,
    input areset,    // Freshly brainwashed Lemmings walk left.
    input bump_left,
    input bump_right,
    input ground,
    output walk_left,
    output walk_right,
    output aaah ); 
	parameter LEFT=0, RIGHT=1,FALLL=2,FALLR=3;
    //fall分出左右更有利于编程
    reg [1:0]state, next_state;
	//这里两位状态寄存器,必须记住!
    always @(*) begin
        // State transition logic
        case(state)
            LEFT:next_state<=ground?(bump_left?RIGHT:LEFT):FALLL;
            RIGHT:next_state<=ground?(bump_right?LEFT:RIGHT):FALLR;
            //这里要记得ground判定在前
            FALLL:next_state<=ground?LEFT:FALLL;
            FALLR:next_state<=ground?RIGHT:FALLR;
        endcase
    end

    always @(posedge clk, posedge areset) begin
        // State flip-flops with asynchronous reset
        if(areset)
            state<=LEFT;
        else
            state<=next_state;
    end

    // Output logic
    assign walk_left = (state == LEFT);
    assign walk_right = (state == RIGHT);
    assign aaah=(state==FALLL||state==FALLR);
endmodule

fall分出左右是点睛之笔

相关推荐
9527华安2 小时前
FPGA实现Aurora 64B66B图像视频点对点传输,基于GTH高速收发器,提供2套工程源码和技术支持
fpga开发·音视频·aurora·gth·高速收发器·64b66b
XINVRY-FPGA12 小时前
EPM240T100I5N Altera FPGA MAX II CPLD
人工智能·嵌入式硬件·fpga开发·硬件工程·dsp开发·射频工程·fpga
第二层皮-合肥18 小时前
FPGA实现ETH接口
单片机·嵌入式硬件·fpga开发
璞致电子21 小时前
【PZ-ZU47DR-KFB】璞致FPGA ZYNQ UltraScalePlus RFSOC QSPI Flash 固化常见问题说明
嵌入式硬件·fpga开发·fpga·软件无线电·sdr
陌夏微秋1 天前
FPGA硬件设计2 最小芯片系统-ZYNQ7020/7010
嵌入式硬件·fpga开发·硬件架构·硬件工程·信息与通信·智能硬件
风已经起了1 天前
FPGA学习笔记——IIC协议简介
笔记·学习·fpga开发
逐梦之程2 天前
FPGA-Vivado2017.4-建立AXI4用于单片机与FPGA之间数据互通
fpga开发
XINVRY-FPGA2 天前
10CL016YF484C8G Altera FPGA Cyclone
嵌入式硬件·网络协议·fpga开发·云计算·硬件工程·信息与通信·fpga
嵌入式-老费3 天前
产品开发实践(常见的软硬结合方式)
fpga开发
FakeOccupational3 天前
【电路笔记 通信】AXI4-Lite协议 FPGA实现 & Valid-Ready Handshake 握手协议
笔记·fpga开发