CONFIG_MFD_PHYTIUM_I2S_LSD=y
CONFIG_MFD_PHYTIUM_I2S_MMD=y
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
./input/serio/phytium-ps2.c
config ARCH_PHYTIUM
bool "Phytium SoC Family"
help
This enables support for Phytium ARMv8 SoC family.
CONFIG_ARCH_PHYTIUM=y
CONFIG_DRM_PHYTIUM=y
CONFIG_DWMAC_PHYTIUM=m
obj-$(CONFIG_DWMAC_PHYTIUM) += dwmac-phytium.o
CONFIG_VIDEO_PHYTIUM_JPEG=m
CONFIG_PHYTIUM_ADC=y
CONFIG_I2C_PHYTIUM_CORE=y
CONFIG_I2C_PHYTIUM_CORE=m
CONFIG_I2C_PHYTIUM_PLATFORM=y
CONFIG_SERIO_PHYTIUM_PS2=y
config SERIO_PHYTIUM_PS2
depends on SERIO
tristate "PHYTIUM PS/2 (keyboard and mouse)"
default y if ARCH_PHYTIUM
depends on PCI
help
This selects support for the PS/2 Host Controller on
Phytium SoCs.
To compile this driver as a module, choose M here: the
module will be called phytium-ps2.
CONFIG_HW_RANDOM_PHYTIUM=y
config HW_RANDOM_PHYTIUM
tristate "Phytium Random Number Generator support"
depends on ARCH_PHYTIUM || COMPILE_TEST
help
This driver provides kernel-side support for the Random Number
Generator hardware found on Phytium SoCs.
To compile this driver as a module, choose M here: the
module will be called phytium-rng.
If unsure, say Y.
obj-$(CONFIG_HW_RANDOM_PHYTIUM) += phytium-rng.o
CONFIG_PHYTIUM_BT_IPMI_BMC=y
config PHYTIUM_KCS_IPMI_BMC
depends on ARCH_PHYTIUM
select IPMI_KCS_BMC
select REGMAP_MMIO
tristate "PHYTIUM KCS IPMI BMC driver"
help
Provides a driver for the KCS (Kerboard Controller Style) IPMI
interface found on Phytium SOCs.
The driver implements the BMC side of the KCS controller, it
provides the access of KCS IO space for BMC side.
config PHYTIUM_BT_IPMI_BMC
depends on ARCH_PHYTIUM
depends on REGMAP && REGMAP_MMIO && MFD_SYSCON
tristate "PHYTIUM BT BMC driver"
help
Provides a driver for the BT (Block Transfer) IPMI interface
found on Phytium SOCs. The driver implements the BMC
side of the BT interface.
obj-$(CONFIG_HOMO_REMOTEPROC) += homo_remoteproc.o
config MTD_NAND_PHYTIUM
tristate
config MTD_NAND_PHYTIUM_PCI
tristate "Support Phytium NAND controller as a PCI device"
select MTD_NAND_PHYTIUM
depends on PCI
help
Enable the driver for NAND flash controller of Phytium Px210 chipset,
using the Phytium NAND controller core.
config MTD_NAND_PHYTIUM_PLAT
tristate "Support Phytium NAND controller as a platform device"
select MTD_NAND_PHYTIUM
depends on ARCH_PHYTIUM
help
Enable the driver for NAND flash controller of Phytium CPU chipset,
using the Phytium NAND controller core.
obj-$(CONFIG_MTD_NAND_PHYTIUM) += phytium_nand.o
obj-$(CONFIG_MTD_NAND_PHYTIUM_PCI) += phytium_nand_pci.o
obj-$(CONFIG_MTD_NAND_PHYTIUM_PLAT) += phytium_nand_plat.o
config PWM_PHYTIUM
tristate "Phytium PWM support"
depends on ARCH_PHYTIUM
help
Generic PWM framework driver for the PWM controller found on
Phytium SoCs.
To compile this driver as a module, choose M here: the module
will be called pwm-phytium.
obj-$(CONFIG_PWM_PHYTIUM) += pwm-phytium.o
CONFIG_PWM_PHYTIUM=y
obj-$(CONFIG_MMC_PHYTIUM_SDCI) += phytium-sdci.o
obj-$(CONFIG_MMC_PHYTIUM_MCI_PCI) += phytium-mci-pci.o phytium-mci.o
obj-$(CONFIG_MMC_PHYTIUM_MCI_PLTFM) += phytium-mci-plat.o phytium-mci.o
media/platform/phytium-jpeg/phytium_jpeg_core.c:8:#include "phytium_jpeg_reg.h"
media/platform/phytium-jpeg/Makefile:2:phytium_jpeg-objs := phytium_jpeg_core.o
media/platform/phytium-jpeg/Makefile:3:obj-$(CONFIG_VIDEO_PHYTIUM_JPEG) += phytium_jpeg.o
media/platform/Makefile:83:obj-$(CONFIG_VIDEO_PHYTIUM_JPEG) += phytium-jpeg/
acpi/acpi_apd.c:161:static const struct apd_device_desc phytium_i2c_desc = {
acpi/acpi_apd.c:166:static const struct apd_device_desc phytium_pe220x_i2c_desc = {
acpi/acpi_apd.c:253: { "PHYT0003", APD_ADDR(phytium_i2c_desc) },
acpi/acpi_apd.c:254: { "PHYT0038", APD_ADDR(phytium_pe220x_i2c_desc) },
iio/adc/Kconfig:1239: will be called phytium-adc.
iio/adc/phytium-adc.c:69:static const struct iio_event_spec phytium_adc_event[] = {
iio/adc/phytium-adc.c:684:module_platform_driver(phytium_adc_driver);
iio/adc/phytium-adc.c:686:MODULE_AUTHOR("Yang Liu <yangliu2021@phytium.com.cn>");
iio/adc/Makefile:114:obj-$(CONFIG_PHYTIUM_ADC) += phytium-adc.o
i2c/busses/i2c-phytium-common.c:21:#include "i2c-phytium-core.h"
i2c/busses/i2c-phytium-common.c:54:u32 phytium_readl(struct phytium_i2c_dev *dev, int offset)
i2c/busses/i2c-phytium-common.c:59:void phytium_writel(struct phytium_i2c_dev *dev, u32 b, int offset)
i2c/busses/i2c-phytium-common.c:64:u32 i2c_phytium_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset)
i2c/busses/i2c-phytium-common.c:72:u32 i2c_phytium_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset)
i2c/busses/i2c-phytium-common.c:77:int i2c_phytium_set_sda_hold(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-common.c:81: dev->sda_hold_time = phytium_readl(dev, IC_SDA_HOLD);
i2c/busses/i2c-phytium-common.c:94:void __i2c_phytium_disable(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-common.c:99: __i2c_phytium_disable_nowait(dev);
i2c/busses/i2c-phytium-common.c:100: if ((phytium_readl(dev, IC_ENABLE_STATUS) & 1) == 0)
i2c/busses/i2c-phytium-common.c:114:unsigned long i2c_phytium_clk_rate(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-common.c:121:int i2c_phytium_prepare_clk(struct phytium_i2c_dev *dev, bool prepare)
i2c/busses/i2c-phytium-common.c:132:EXPORT_SYMBOL_GPL(i2c_phytium_prepare_clk);
i2c/busses/i2c-phytium-common.c:134:int i2c_phytium_wait_bus_not_busy(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-common.c:138: while (phytium_readl(dev, IC_STATUS) & IC_STATUS_ACTIVITY) {
i2c/busses/i2c-phytium-common.c:143: if (phytium_readl(dev, IC_STATUS) & IC_STATUS_ACTIVITY)
i2c/busses/i2c-phytium-common.c:154:int i2c_phytium_handle_tx_abort(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-common.c:179:u32 i2c_phytium_func(struct i2c_adapter *adapter)
i2c/busses/i2c-phytium-common.c:181: struct phytium_i2c_dev *dev = i2c_get_adapdata(adapter);
i2c/busses/i2c-phytium-common.c:186:void i2c_phytium_disable(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-common.c:189: __i2c_phytium_disable(dev);
i2c/busses/i2c-phytium-common.c:192: phytium_writel(dev, 0, IC_INTR_MASK);
i2c/busses/i2c-phytium-common.c:193: phytium_readl(dev, IC_CLR_INTR);
i2c/busses/i2c-phytium-common.c:196:void i2c_phytium_disable_int(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-common.c:198: phytium_writel(dev, 0, IC_INTR_MASK);
i2c/busses/i2c-phytium-common.c:201:MODULE_AUTHOR("Cheng Quan <chengquan@phytium.com.cn>");
i2c/busses/i2c-phytium-master.c:18:#include "i2c-phytium-core.h"
i2c/busses/i2c-phytium-master.c:20:static int i2c_phytium_init_master(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:23: __i2c_phytium_disable(dev);
i2c/busses/i2c-phytium-master.c:26: phytium_writel(dev, dev->ss_hcnt, IC_SS_SCL_HCNT);
i2c/busses/i2c-phytium-master.c:27: phytium_writel(dev, dev->ss_lcnt, IC_SS_SCL_LCNT);
i2c/busses/i2c-phytium-master.c:30: phytium_writel(dev, dev->fs_hcnt, IC_FS_SCL_HCNT);
i2c/busses/i2c-phytium-master.c:31: phytium_writel(dev, dev->fs_lcnt, IC_FS_SCL_LCNT);
i2c/busses/i2c-phytium-master.c:35: phytium_writel(dev, dev->hs_hcnt, IC_HS_SCL_HCNT);
i2c/busses/i2c-phytium-master.c:36: phytium_writel(dev, dev->hs_lcnt, IC_HS_SCL_LCNT);
i2c/busses/i2c-phytium-master.c:41: phytium_writel(dev, dev->sda_hold_time, IC_SDA_HOLD);
i2c/busses/i2c-phytium-master.c:44: phytium_writel(dev, dev->tx_fifo_depth >> 1, IC_TX_TL);
i2c/busses/i2c-phytium-master.c:45: phytium_writel(dev, 0, IC_RX_TL);
i2c/busses/i2c-phytium-master.c:48: phytium_writel(dev, dev->master_cfg, IC_CON);
i2c/busses/i2c-phytium-master.c:53:static void i2c_phytium_xfer_init(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:59: __i2c_phytium_disable(dev);
i2c/busses/i2c-phytium-master.c:62: ic_con = phytium_readl(dev, IC_CON);
i2c/busses/i2c-phytium-master.c:70: phytium_writel(dev, ic_con, IC_CON);
i2c/busses/i2c-phytium-master.c:76: phytium_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, IC_TAR);
i2c/busses/i2c-phytium-master.c:79: i2c_phytium_disable_int(dev);
i2c/busses/i2c-phytium-master.c:82: __i2c_phytium_enable(dev);
i2c/busses/i2c-phytium-master.c:85: phytium_readl(dev, IC_ENABLE_STATUS);
i2c/busses/i2c-phytium-master.c:88: phytium_readl(dev, IC_CLR_INTR);
i2c/busses/i2c-phytium-master.c:89: phytium_writel(dev, IC_INTR_SMBUS_MASK, IC_INTR_MASK);
i2c/busses/i2c-phytium-master.c:92:static void i2c_phytium_xfer_msg(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:124: tx_limit = dev->tx_fifo_depth - phytium_readl(dev, IC_TXFLR);
i2c/busses/i2c-phytium-master.c:125: rx_limit = dev->tx_fifo_depth - phytium_readl(dev, IC_RXFLR);
i2c/busses/i2c-phytium-master.c:144: phytium_writel(dev, cmd | 0x100, IC_DATA_CMD);
i2c/busses/i2c-phytium-master.c:148: phytium_writel(dev, cmd | *buf++, IC_DATA_CMD);
i2c/busses/i2c-phytium-master.c:177: phytium_writel(dev, intr_mask, IC_INTR_MASK);
i2c/busses/i2c-phytium-master.c:180:static u8 i2c_phytium_recv_len(struct phytium_i2c_dev *dev, u8 len)
i2c/busses/i2c-phytium-master.c:197:static void i2c_phytium_read(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:217: rx_valid = phytium_readl(dev, IC_RXFLR);
i2c/busses/i2c-phytium-master.c:222: *buf = phytium_readl(dev, IC_DATA_CMD);
i2c/busses/i2c-phytium-master.c:226: len = i2c_phytium_recv_len(dev, *buf);
i2c/busses/i2c-phytium-master.c:243:static int i2c_phytium_xfer(struct i2c_adapter *adapter, struct i2c_msg msgs[], int num)
i2c/busses/i2c-phytium-master.c:245: struct phytium_i2c_dev *dev = i2c_get_adapdata(adapter);
i2c/busses/i2c-phytium-master.c:263: ret = i2c_phytium_wait_bus_not_busy(dev);
i2c/busses/i2c-phytium-master.c:268: i2c_phytium_xfer_init(dev);
i2c/busses/i2c-phytium-master.c:274: i2c_phytium_init_master(dev);
i2c/busses/i2c-phytium-master.c:279: __i2c_phytium_disable_nowait(dev);
i2c/busses/i2c-phytium-master.c:293: ret = i2c_phytium_handle_tx_abort(dev);
i2c/busses/i2c-phytium-master.c:309:static const struct i2c_algorithm i2c_phytium_algo = {
i2c/busses/i2c-phytium-master.c:310: .master_xfer = i2c_phytium_xfer,
i2c/busses/i2c-phytium-master.c:311: .functionality = i2c_phytium_func,
i2c/busses/i2c-phytium-master.c:314:static const struct i2c_adapter_quirks i2c_phytium_quirks = {
i2c/busses/i2c-phytium-master.c:318:static u32 i2c_phytium_read_clear_intrbits(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:322: stat = phytium_readl(dev, IC_INTR_STAT);
i2c/busses/i2c-phytium-master.c:325: phytium_readl(dev, IC_CLR_RX_UNDER);
i2c/busses/i2c-phytium-master.c:327: phytium_readl(dev, IC_CLR_RX_OVER);
i2c/busses/i2c-phytium-master.c:329: phytium_readl(dev, IC_CLR_TX_OVER);
i2c/busses/i2c-phytium-master.c:331: phytium_readl(dev, IC_CLR_RD_REQ);
i2c/busses/i2c-phytium-master.c:333: dev->abort_source = phytium_readl(dev, IC_TX_ABRT_SOURCE);
i2c/busses/i2c-phytium-master.c:334: phytium_readl(dev, IC_CLR_TX_ABRT);
i2c/busses/i2c-phytium-master.c:337: phytium_readl(dev, IC_CLR_RX_DONE);
i2c/busses/i2c-phytium-master.c:339: phytium_readl(dev, IC_CLR_ACTIVITY);
i2c/busses/i2c-phytium-master.c:341: phytium_readl(dev, IC_CLR_STOP_DET);
i2c/busses/i2c-phytium-master.c:343: phytium_readl(dev, IC_CLR_START_DET);
i2c/busses/i2c-phytium-master.c:345: phytium_readl(dev, IC_CLR_GEN_CALL);
i2c/busses/i2c-phytium-master.c:347: phytium_readl(dev, IC_CLR_SMBCLK_EXT_LOW_TIMEOUT);
i2c/busses/i2c-phytium-master.c:349: phytium_readl(dev, IC_CLR_SMBCLK_TMO_LOW_TIMEOUT);
i2c/busses/i2c-phytium-master.c:351: phytium_readl(dev, IC_CLR_SMBDAT_LOW_TIMEOUT);
i2c/busses/i2c-phytium-master.c:353: phytium_readl(dev, IC_CLR_SMBALERT_IN_N);
i2c/busses/i2c-phytium-master.c:358:static int i2c_phytium_irq_handler_master(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:362: stat = i2c_phytium_read_clear_intrbits(dev);
i2c/busses/i2c-phytium-master.c:366: phytium_writel(dev, phytium_readl(dev, IC_ENABLE) & (~BIT(6)),
i2c/busses/i2c-phytium-master.c:368: phytium_writel(dev, phytium_readl(dev, IC_ENABLE) | BIT(4),
i2c/busses/i2c-phytium-master.c:374: phytium_writel(dev, phytium_readl(dev, IC_ENABLE) | BIT(6),
i2c/busses/i2c-phytium-master.c:389: phytium_writel(dev, 0, IC_INTR_MASK);
i2c/busses/i2c-phytium-master.c:394: i2c_phytium_read(dev);
i2c/busses/i2c-phytium-master.c:397: i2c_phytium_xfer_msg(dev);
i2c/busses/i2c-phytium-master.c:405: stat = phytium_readl(dev, IC_INTR_MASK);
i2c/busses/i2c-phytium-master.c:406: i2c_phytium_disable_int(dev);
i2c/busses/i2c-phytium-master.c:407: phytium_writel(dev, stat, IC_INTR_MASK);
i2c/busses/i2c-phytium-master.c:413:static int i2c_phytium_set_timings_master(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:427: ic_clk = i2c_phytium_clk_rate(dev);
i2c/busses/i2c-phytium-master.c:429: i2c_phytium_scl_hcnt(ic_clk,
i2c/busses/i2c-phytium-master.c:435: i2c_phytium_scl_lcnt(ic_clk,
i2c/busses/i2c-phytium-master.c:463: ic_clk = i2c_phytium_clk_rate(dev);
i2c/busses/i2c-phytium-master.c:465: i2c_phytium_scl_hcnt(ic_clk,
i2c/busses/i2c-phytium-master.c:471: i2c_phytium_scl_lcnt(ic_clk,
i2c/busses/i2c-phytium-master.c:483: ret = i2c_phytium_set_sda_hold(dev);
i2c/busses/i2c-phytium-master.c:503:static irqreturn_t i2c_phytium_isr(int this_irq, void *dev_id)
i2c/busses/i2c-phytium-master.c:505: struct phytium_i2c_dev *dev = dev_id;
i2c/busses/i2c-phytium-master.c:508: enabled = phytium_readl(dev, IC_ENABLE);
i2c/busses/i2c-phytium-master.c:509: stat = phytium_readl(dev, IC_RAW_INTR_STAT);
i2c/busses/i2c-phytium-master.c:513: i2c_phytium_irq_handler_master(dev);
i2c/busses/i2c-phytium-master.c:518:int i2c_phytium_probe(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-master.c:526: dev->init = i2c_phytium_init_master;
i2c/busses/i2c-phytium-master.c:527: dev->disable = i2c_phytium_disable;
i2c/busses/i2c-phytium-master.c:528: dev->disable_int = i2c_phytium_disable_int;
i2c/busses/i2c-phytium-master.c:530: ret = i2c_phytium_set_timings_master(dev);
i2c/busses/i2c-phytium-master.c:540: phytium_writel(dev, DEFAULT_TIMEOUT, IC_SMBCLK_LOW_MEXT);
i2c/busses/i2c-phytium-master.c:541: phytium_writel(dev, DEFAULT_TIMEOUT, IC_SMBCLK_LOW_TIMEOUT);
i2c/busses/i2c-phytium-master.c:542: phytium_writel(dev, DEFAULT_TIMEOUT, IC_SMBDAT_STUCK_TIMEOUT);
i2c/busses/i2c-phytium-master.c:546: adapter->algo = &i2c_phytium_algo;
i2c/busses/i2c-phytium-master.c:547: adapter->quirks = &i2c_phytium_quirks;
i2c/busses/i2c-phytium-master.c:553: i2c_phytium_disable_int(dev);
i2c/busses/i2c-phytium-master.c:554: ret = devm_request_irq(dev->dev, dev->irq, i2c_phytium_isr, irq_flags,
i2c/busses/i2c-phytium-master.c:575:EXPORT_SYMBOL_GPL(i2c_phytium_probe);
i2c/busses/Kconfig:1222: will be called i2c-phytium-pci.
i2c/busses/Kconfig:1235: will be called i2c-phytium-platform.
i2c/busses/i2c-phytium-core.h:167:struct phytium_i2c_dev {
i2c/busses/i2c-phytium-core.h:177: u32 (*get_clk_rate_khz)(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:183: struct phytium_pci_i2c *controller;
i2c/busses/i2c-phytium-core.h:218: void (*disable)(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:219: void (*disable_int)(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:220: int (*init)(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:227:u32 phytium_readl(struct phytium_i2c_dev *dev, int offset);
i2c/busses/i2c-phytium-core.h:228:void phytium_writel(struct phytium_i2c_dev *dev, u32 b, int offset);
i2c/busses/i2c-phytium-core.h:229:unsigned long i2c_phytium_clk_rate(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:230:int i2c_phytium_prepare_clk(struct phytium_i2c_dev *dev, bool prepare);
i2c/busses/i2c-phytium-core.h:231:int i2c_phytium_wait_bus_not_busy(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:232:int i2c_phytium_handle_tx_abort(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:233:u32 i2c_phytium_func(struct i2c_adapter *adap);
i2c/busses/i2c-phytium-core.h:234:void i2c_phytium_disable(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:235:void i2c_phytium_disable_int(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:236:int i2c_phytium_set_sda_hold(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:237:u32 i2c_phytium_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset);
i2c/busses/i2c-phytium-core.h:238:u32 i2c_phytium_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset);
i2c/busses/i2c-phytium-core.h:240:static inline void __i2c_phytium_enable(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-core.h:242: phytium_writel(dev, 1, IC_ENABLE);
i2c/busses/i2c-phytium-core.h:245:static inline void __i2c_phytium_disable_nowait(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-core.h:247: phytium_writel(dev, 0, IC_ENABLE);
i2c/busses/i2c-phytium-core.h:250:void __i2c_phytium_disable(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:252:extern int i2c_phytium_probe(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-core.h:254:extern int i2c_phytium_probe_slave(struct phytium_i2c_dev *dev);
i2c/busses/i2c-phytium-pci.c:22:#include "i2c-phytium-core.h"
i2c/busses/i2c-phytium-pci.c:24:#define DRV_NAME "i2c-phytium-pci"
i2c/busses/i2c-phytium-pci.c:26:enum phytium_pci_ctl_id_t {
i2c/busses/i2c-phytium-pci.c:38:struct phytium_pci_i2c {
i2c/busses/i2c-phytium-pci.c:47: int (*setup)(struct pci_dev *pdev, struct phytium_pci_i2c *c);
i2c/busses/i2c-phytium-pci.c:59:static int octopus_setup(struct pci_dev *pdev, struct phytium_pci_i2c *c)
i2c/busses/i2c-phytium-pci.c:61: struct phytium_i2c_dev *i2c = pci_get_drvdata(pdev);
i2c/busses/i2c-phytium-pci.c:81:static struct phytium_pci_i2c pci_ctrl_info[] = {
i2c/busses/i2c-phytium-pci.c:96:static int i2c_phytium_pci_suspend(struct device *dev)
i2c/busses/i2c-phytium-pci.c:99: struct phytium_i2c_dev *i_dev = pci_get_drvdata(pdev);
i2c/busses/i2c-phytium-pci.c:106:static int i2c_phytium_pci_resume(struct device *dev)
i2c/busses/i2c-phytium-pci.c:109: struct phytium_i2c_dev *i_dev = pci_get_drvdata(pdev);
i2c/busses/i2c-phytium-pci.c:115:static UNIVERSAL_DEV_PM_OPS(i2c_phytium_pm_ops, i2c_phytium_pci_suspend,
i2c/busses/i2c-phytium-pci.c:116: i2c_phytium_pci_resume, NULL);
i2c/busses/i2c-phytium-pci.c:118:static u32 i2c_phytium_get_clk_rate_khz(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-pci.c:123:static int i2c_phytium_pci_probe(struct pci_dev *pdev,
i2c/busses/i2c-phytium-pci.c:126: struct phytium_i2c_dev *dev;
i2c/busses/i2c-phytium-pci.c:128: struct phytium_pci_i2c *controller;
i2c/busses/i2c-phytium-pci.c:153: dev = devm_kzalloc(&pdev->dev, sizeof(struct phytium_i2c_dev), GFP_KERNEL);
i2c/busses/i2c-phytium-pci.c:160: dev->get_clk_rate_khz = i2c_phytium_get_clk_rate_khz;
i2c/busses/i2c-phytium-pci.c:188: ret = i2c_phytium_probe(dev);
i2c/busses/i2c-phytium-pci.c:207:static void i2c_phytium_pci_remove(struct pci_dev *pdev)
i2c/busses/i2c-phytium-pci.c:209: struct phytium_i2c_dev *dev = pci_get_drvdata(pdev);
i2c/busses/i2c-phytium-pci.c:218:static const struct pci_device_id i2_phytium_pci_ids[] = {
i2c/busses/i2c-phytium-pci.c:223:MODULE_DEVICE_TABLE(pci, i2_phytium_pci_ids);
i2c/busses/i2c-phytium-pci.c:225:static struct pci_driver phytium_i2c_driver = {
i2c/busses/i2c-phytium-pci.c:227: .id_table = i2_phytium_pci_ids,
i2c/busses/i2c-phytium-pci.c:228: .probe = i2c_phytium_pci_probe,
i2c/busses/i2c-phytium-pci.c:229: .remove = i2c_phytium_pci_remove,
i2c/busses/i2c-phytium-pci.c:231: .pm = &i2c_phytium_pm_ops,
i2c/busses/i2c-phytium-pci.c:235:module_pci_driver(phytium_i2c_driver);
i2c/busses/i2c-phytium-pci.c:237:MODULE_ALIAS("i2c-phytium-pci");
i2c/busses/i2c-phytium-pci.c:238:MODULE_AUTHOR("Cheng Quan <chengquan@phytium.com.cn>");
i2c/busses/i2c-phytium-slave.c:17:#include "i2c-phytium-core.h"
i2c/busses/i2c-phytium-slave.c:19:static void i2c_phytium_configure_fifo_slave(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-slave.c:22: phytium_writel(dev, 0, IC_TX_TL);
i2c/busses/i2c-phytium-slave.c:23: phytium_writel(dev, 0, IC_RX_TL);
i2c/busses/i2c-phytium-slave.c:26: phytium_writel(dev, dev->slave_cfg, IC_CON);
i2c/busses/i2c-phytium-slave.c:27: phytium_writel(dev, IC_INTR_SLAVE_MASK, IC_INTR_MASK);
i2c/busses/i2c-phytium-slave.c:30:static int i2c_phytium_init_slave(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-slave.c:33: __i2c_phytium_disable(dev);
i2c/busses/i2c-phytium-slave.c:37: phytium_writel(dev, dev->sda_hold_time, IC_SDA_HOLD);
i2c/busses/i2c-phytium-slave.c:39: i2c_phytium_configure_fifo_slave(dev);
i2c/busses/i2c-phytium-slave.c:44:static int i2c_phytium_reg_slave(struct i2c_client *slave)
i2c/busses/i2c-phytium-slave.c:46: struct phytium_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
i2c/busses/i2c-phytium-slave.c:58: __i2c_phytium_disable_nowait(dev);
i2c/busses/i2c-phytium-slave.c:59: phytium_writel(dev, slave->addr, IC_SAR);
i2c/busses/i2c-phytium-slave.c:62: __i2c_phytium_enable(dev);
i2c/busses/i2c-phytium-slave.c:75:static int i2c_phytium_unreg_slave(struct i2c_client *slave)
i2c/busses/i2c-phytium-slave.c:77: struct phytium_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
i2c/busses/i2c-phytium-slave.c:87:static u32 i2c_phytium_read_clear_intrbits_slave(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-slave.c:97: * stat = phytium_readl(IC_INTR_STAT);
i2c/busses/i2c-phytium-slave.c:99: * stat = phytium_readl(IC_RAW_INTR_STAT) & phytium_readl(IC_INTR_MASK);
i2c/busses/i2c-phytium-slave.c:103: stat = phytium_readl(dev, IC_INTR_STAT);
i2c/busses/i2c-phytium-slave.c:108: * phytium_readl(IC_INTR_STAT) to phytium_readl(IC_CLR_INTR).
i2c/busses/i2c-phytium-slave.c:113: phytium_readl(dev, IC_CLR_TX_ABRT);
i2c/busses/i2c-phytium-slave.c:115: phytium_readl(dev, IC_CLR_RX_UNDER);
i2c/busses/i2c-phytium-slave.c:117: phytium_readl(dev, IC_CLR_RX_OVER);
i2c/busses/i2c-phytium-slave.c:119: phytium_readl(dev, IC_CLR_TX_OVER);
i2c/busses/i2c-phytium-slave.c:121: phytium_readl(dev, IC_CLR_RX_DONE);
i2c/busses/i2c-phytium-slave.c:123: phytium_readl(dev, IC_CLR_ACTIVITY);
i2c/busses/i2c-phytium-slave.c:125: phytium_readl(dev, IC_CLR_STOP_DET);
i2c/busses/i2c-phytium-slave.c:127: phytium_readl(dev, IC_CLR_START_DET);
i2c/busses/i2c-phytium-slave.c:129: phytium_readl(dev, IC_CLR_GEN_CALL);
i2c/busses/i2c-phytium-slave.c:138:static int i2c_phytium_irq_handler_slave(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-slave.c:143: stat = phytium_readl(dev, IC_INTR_STAT);
i2c/busses/i2c-phytium-slave.c:144: enabled = phytium_readl(dev, IC_ENABLE);
i2c/busses/i2c-phytium-slave.c:145: raw_stat = phytium_readl(dev, IC_RAW_INTR_STAT);
i2c/busses/i2c-phytium-slave.c:146: slave_activity = ((phytium_readl(dev, IC_STATUS) &
i2c/busses/i2c-phytium-slave.c:162: val = phytium_readl(dev, IC_DATA_CMD);
i2c/busses/i2c-phytium-slave.c:170: phytium_readl(dev, IC_CLR_RD_REQ);
i2c/busses/i2c-phytium-slave.c:171: stat = i2c_phytium_read_clear_intrbits_slave(dev);
i2c/busses/i2c-phytium-slave.c:173: phytium_readl(dev, IC_CLR_RD_REQ);
i2c/busses/i2c-phytium-slave.c:174: phytium_readl(dev, IC_CLR_RX_UNDER);
i2c/busses/i2c-phytium-slave.c:175: stat = i2c_phytium_read_clear_intrbits_slave(dev);
i2c/busses/i2c-phytium-slave.c:180: phytium_writel(dev, val, IC_DATA_CMD);
i2c/busses/i2c-phytium-slave.c:187: phytium_readl(dev, IC_CLR_RX_DONE);
i2c/busses/i2c-phytium-slave.c:190: stat = i2c_phytium_read_clear_intrbits_slave(dev);
i2c/busses/i2c-phytium-slave.c:195: val = phytium_readl(dev, IC_DATA_CMD);
i2c/busses/i2c-phytium-slave.c:201: stat = i2c_phytium_read_clear_intrbits_slave(dev);
i2c/busses/i2c-phytium-slave.c:207:static irqreturn_t i2c_phytium_isr_slave(int this_irq, void *dev_id)
i2c/busses/i2c-phytium-slave.c:209: struct phytium_i2c_dev *dev = dev_id;
i2c/busses/i2c-phytium-slave.c:212: i2c_phytium_read_clear_intrbits_slave(dev);
i2c/busses/i2c-phytium-slave.c:213: ret = i2c_phytium_irq_handler_slave(dev);
i2c/busses/i2c-phytium-slave.c:220:static const struct i2c_algorithm i2c_phytium_algo = {
i2c/busses/i2c-phytium-slave.c:221: .functionality = i2c_phytium_func,
i2c/busses/i2c-phytium-slave.c:222: .reg_slave = i2c_phytium_reg_slave,
i2c/busses/i2c-phytium-slave.c:223: .unreg_slave = i2c_phytium_unreg_slave,
i2c/busses/i2c-phytium-slave.c:226:int i2c_phytium_probe_slave(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-slave.c:233: dev->init = i2c_phytium_init_slave;
i2c/busses/i2c-phytium-slave.c:234: dev->disable = i2c_phytium_disable;
i2c/busses/i2c-phytium-slave.c:235: dev->disable_int = i2c_phytium_disable_int;
i2c/busses/i2c-phytium-slave.c:244: adap->algo = &i2c_phytium_algo;
i2c/busses/i2c-phytium-slave.c:248: ret = devm_request_irq(dev->dev, dev->irq, i2c_phytium_isr_slave,
i2c/busses/i2c-phytium-slave.c:262:EXPORT_SYMBOL_GPL(i2c_phytium_probe_slave);
i2c/busses/i2c-phytium-platform.c:30:#include "i2c-phytium-core.h"
i2c/busses/i2c-phytium-platform.c:32:#define DRV_NAME "i2c-phytium-platform"
i2c/busses/i2c-phytium-platform.c:34:static u32 i2c_phytium_get_clk_rate_khz(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-platform.c:40:static void phytium_i2c_acpi_params(struct platform_device *pdev, char method[],
i2c/busses/i2c-phytium-platform.c:62:static int phytium_i2c_acpi_configure(struct platform_device *pdev)
i2c/busses/i2c-phytium-platform.c:64: struct phytium_i2c_dev *dev = platform_get_drvdata(pdev);
i2c/busses/i2c-phytium-platform.c:79: phytium_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
i2c/busses/i2c-phytium-platform.c:80: phytium_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
i2c/busses/i2c-phytium-platform.c:81: phytium_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
i2c/busses/i2c-phytium-platform.c:82: phytium_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
i2c/busses/i2c-phytium-platform.c:110:static const struct acpi_device_id phytium_i2c_acpi_match[] = {
i2c/busses/i2c-phytium-platform.c:114:MODULE_DEVICE_TABLE(acpi, phytium_i2c_acpi_match);
i2c/busses/i2c-phytium-platform.c:116:static inline int phytium_i2c_acpi_configure(struct platform_device *pdev)
i2c/busses/i2c-phytium-platform.c:122:static void i2c_phytium_configure_master(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-platform.c:145:static void i2c_phytium_configure_slave(struct phytium_i2c_dev *dev)
i2c/busses/i2c-phytium-platform.c:155:static int phytium_i2c_plat_probe(struct platform_device *pdev)
i2c/busses/i2c-phytium-platform.c:158: struct phytium_i2c_dev *dev;
i2c/busses/i2c-phytium-platform.c:172: dev = devm_kzalloc(&pdev->dev, sizeof(struct phytium_i2c_dev), GFP_KERNEL);
i2c/busses/i2c-phytium-platform.c:219: phytium_i2c_acpi_configure(pdev);
i2c/busses/i2c-phytium-platform.c:235: i2c_phytium_configure_slave(dev);
i2c/busses/i2c-phytium-platform.c:237: i2c_phytium_configure_master(dev);
i2c/busses/i2c-phytium-platform.c:240: if (!i2c_phytium_prepare_clk(dev, true)) {
i2c/busses/i2c-phytium-platform.c:243: dev->get_clk_rate_khz = i2c_phytium_get_clk_rate_khz;
i2c/busses/i2c-phytium-platform.c:276: ret = i2c_phytium_probe_slave(dev);
i2c/busses/i2c-phytium-platform.c:278: ret = i2c_phytium_probe(dev);
i2c/busses/i2c-phytium-platform.c:293:static int phytium_i2c_plat_remove(struct platform_device *pdev)
i2c/busses/i2c-phytium-platform.c:295: struct phytium_i2c_dev *dev = platform_get_drvdata(pdev);
i2c/busses/i2c-phytium-platform.c:314:static const struct of_device_id phytium_i2c_of_match[] = {
i2c/busses/i2c-phytium-platform.c:315: { .compatible = "phytium,i2c", },
i2c/busses/i2c-phytium-platform.c:318:MODULE_DEVICE_TABLE(of, phytium_i2c_of_match);
i2c/busses/i2c-phytium-platform.c:321:static int __maybe_unused phytium_i2c_plat_suspend(struct device *dev)
i2c/busses/i2c-phytium-platform.c:323: struct phytium_i2c_dev *idev = dev_get_drvdata(dev);
i2c/busses/i2c-phytium-platform.c:326: i2c_phytium_prepare_clk(idev, false);
i2c/busses/i2c-phytium-platform.c:331:static int __maybe_unused phytium_i2c_plat_resume(struct device *dev)
i2c/busses/i2c-phytium-platform.c:333: struct phytium_i2c_dev *idev = dev_get_drvdata(dev);
i2c/busses/i2c-phytium-platform.c:335: i2c_phytium_prepare_clk(idev, true);
i2c/busses/i2c-phytium-platform.c:342:static const struct dev_pm_ops phytium_i2c_dev_pm_ops = {
i2c/busses/i2c-phytium-platform.c:343: SET_LATE_SYSTEM_SLEEP_PM_OPS(phytium_i2c_plat_suspend,
i2c/busses/i2c-phytium-platform.c:344: phytium_i2c_plat_resume)
i2c/busses/i2c-phytium-platform.c:345: SET_RUNTIME_PM_OPS(phytium_i2c_plat_suspend,
i2c/busses/i2c-phytium-platform.c:346: phytium_i2c_plat_resume, NULL)
i2c/busses/i2c-phytium-platform.c:349:static struct platform_driver phytium_i2c_driver = {
i2c/busses/i2c-phytium-platform.c:350: .probe = phytium_i2c_plat_probe,
i2c/busses/i2c-phytium-platform.c:351: .remove = phytium_i2c_plat_remove,
i2c/busses/i2c-phytium-platform.c:354: .of_match_table = of_match_ptr(phytium_i2c_of_match),
i2c/busses/i2c-phytium-platform.c:355: .acpi_match_table = ACPI_PTR(phytium_i2c_acpi_match),
i2c/busses/i2c-phytium-platform.c:356: .pm = &phytium_i2c_dev_pm_ops,
i2c/busses/i2c-phytium-platform.c:359:module_platform_driver(phytium_i2c_driver);
i2c/busses/i2c-phytium-platform.c:361:MODULE_ALIAS("platform:i2c-phytium");
i2c/busses/i2c-phytium-platform.c:362:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
i2c/busses/Makefile:126:obj-$(CONFIG_I2C_PHYTIUM_CORE) += i2c-phytium-core.o
i2c/busses/Makefile:127:i2c-phytium-core-objs := i2c-phytium-common.o i2c-phytium-master.o i2c-phytium-slave.o
i2c/busses/Makefile:128:obj-$(CONFIG_I2C_PHYTIUM_PCI) += i2c-phytium-pci.o
i2c/busses/Makefile:129:obj-$(CONFIG_I2C_PHYTIUM_PLATFORM) += i2c-phytium-platform.o
input/serio/Kconfig:53: module will be called phytium-ps2.
input/serio/Makefile:10:obj-$(CONFIG_SERIO_PHYTIUM_PS2) += phytium-ps2.o
input/serio/phytium-ps2.c:17:#define DRV_NAME "phytium_ps2_pci"
input/serio/phytium-ps2.c:40:struct phytium_ps2_data {
input/serio/phytium-ps2.c:46:static irqreturn_t phytium_ps2_irq(int irq, void *devid)
input/serio/phytium-ps2.c:48: struct phytium_ps2_data *ps2if = devid;
input/serio/phytium-ps2.c:77:int phytium_ps2_write(struct serio *serio, unsigned char val)
input/serio/phytium-ps2.c:79: struct phytium_ps2_data *ps2if = serio->port_data;
input/serio/phytium-ps2.c:92:int phytium_ps2_open(struct serio *io)
input/serio/phytium-ps2.c:94: struct phytium_ps2_data *ps2if = io->port_data;
input/serio/phytium-ps2.c:104:void phytium_ps2_close(struct serio *io)
input/serio/phytium-ps2.c:106: struct phytium_ps2_data *ps2if = io->port_data;
input/serio/phytium-ps2.c:111:static int phytium_pci_ps2_probe(struct pci_dev *pdev, const struct pci_device_id *id)
input/serio/phytium-ps2.c:113: struct phytium_ps2_data *ps2if;
input/serio/phytium-ps2.c:125: ps2if = devm_kzalloc(&pdev->dev, sizeof(struct phytium_ps2_data), GFP_KERNEL);
input/serio/phytium-ps2.c:133: serio->write = phytium_ps2_write;
input/serio/phytium-ps2.c:134: serio->open = phytium_ps2_open;
input/serio/phytium-ps2.c:135: serio->close = phytium_ps2_close;
input/serio/phytium-ps2.c:144: ret = devm_request_irq(&pdev->dev, pdev->irq, phytium_ps2_irq,
input/serio/phytium-ps2.c:162:static void phytium_pci_ps2_remove(struct pci_dev *pdev)
input/serio/phytium-ps2.c:164: struct phytium_ps2_data *ps2if = pci_get_drvdata(pdev);
input/serio/phytium-ps2.c:170:static const struct pci_device_id phytium_pci_ps2_ids[] = {
input/serio/phytium-ps2.c:174:MODULE_DEVICE_TABLE(pci, phytium_pci_ps2_ids);
input/serio/phytium-ps2.c:176:static struct pci_driver phytium_pci_ps2_driver = {
input/serio/phytium-ps2.c:178: .id_table = phytium_pci_ps2_ids,
input/serio/phytium-ps2.c:179: .probe = phytium_pci_ps2_probe,
input/serio/phytium-ps2.c:180: .remove = phytium_pci_ps2_remove,
input/serio/phytium-ps2.c:182:module_pci_driver(phytium_pci_ps2_driver);
input/serio/phytium-ps2.c:184:MODULE_AUTHOR("Cheng Quan <chengquan@phytium.com.cn>");
input/keyboard/Kconfig:800: module will be called phytium_keypad.
input/keyboard/phytium-keypad.c:44:struct phytium_keypad {
input/keyboard/phytium-keypad.c:80:static u32 phytium_read(struct phytium_keypad *keypad, int reg)
input/keyboard/phytium-keypad.c:85:static void phytium_write(struct phytium_keypad *keypad, u32 value, int reg)
input/keyboard/phytium-keypad.c:91:static void phytium_keypad_scan_matrix(struct phytium_keypad *keypad,
input/keyboard/phytium-keypad.c:104: reg_val = phytium_read(keypad, KDDR);
input/keyboard/phytium-keypad.c:106: phytium_write(keypad, reg_val, KDDR);
input/keyboard/phytium-keypad.c:115: phytium_write(keypad, reg_val, KDDR);
input/keyboard/phytium-keypad.c:116: reg_val = phytium_read(keypad, KPDR);
input/keyboard/phytium-keypad.c:118: phytium_write(keypad, reg_val, KPDR);
input/keyboard/phytium-keypad.c:130: reg_val = phytium_read(keypad, KPDR);
input/keyboard/phytium-keypad.c:141: phytium_write(keypad, reg_val, KDDR);
input/keyboard/phytium-keypad.c:142: phytium_write(keypad, 0x00000000, KPDR);
input/keyboard/phytium-keypad.c:149:static void phytium_keypad_fire_events(struct phytium_keypad *keypad,
input/keyboard/phytium-keypad.c:187: * phytium_keypad_check_for_events is the timer handler.
input/keyboard/phytium-keypad.c:189:static void phytium_keypad_check_for_events(struct timer_list *t)
input/keyboard/phytium-keypad.c:191: struct phytium_keypad *keypad = from_timer(keypad, t, check_matrix_timer);
input/keyboard/phytium-keypad.c:199: phytium_keypad_scan_matrix(keypad, matrix_volatile_state);
input/keyboard/phytium-keypad.c:244: phytium_keypad_fire_events(keypad, matrix_volatile_state);
input/keyboard/phytium-keypad.c:263: reg_val = phytium_read(keypad, KPSR);
input/keyboard/phytium-keypad.c:265: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:267: reg_val = phytium_read(keypad, KPSR);
input/keyboard/phytium-keypad.c:270: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:281: reg_val = phytium_read(keypad, KPSR);
input/keyboard/phytium-keypad.c:283: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:285: reg_val = phytium_read(keypad, KPSR);
input/keyboard/phytium-keypad.c:288: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:292:static irqreturn_t phytium_keypad_irq_handler(int irq, void *dev_id)
input/keyboard/phytium-keypad.c:294: struct phytium_keypad *keypad = dev_id;
input/keyboard/phytium-keypad.c:297: reg_val = phytium_read(keypad, KPSR);
input/keyboard/phytium-keypad.c:302: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:316:static void phytium_keypad_config(struct phytium_keypad *keypad)
input/keyboard/phytium-keypad.c:324: reg_val = phytium_read(keypad, KPCR);
input/keyboard/phytium-keypad.c:327: phytium_write(keypad, reg_val, KPCR);
input/keyboard/phytium-keypad.c:332: phytium_write(keypad, reg_val, KDDR);
input/keyboard/phytium-keypad.c:333: phytium_write(keypad, 0x00000000, KPDR);
input/keyboard/phytium-keypad.c:339: reg_val = phytium_read(keypad, KPSR);
input/keyboard/phytium-keypad.c:342: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:347: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:350:static void phytium_keypad_inhibit(struct phytium_keypad *keypad)
input/keyboard/phytium-keypad.c:355: reg_val = phytium_read(keypad, KPSR);
input/keyboard/phytium-keypad.c:358: phytium_write(keypad, reg_val, KPSR);
input/keyboard/phytium-keypad.c:361:static void phytium_keypad_close(struct input_dev *dev)
input/keyboard/phytium-keypad.c:363: struct phytium_keypad *keypad = input_get_drvdata(dev);
input/keyboard/phytium-keypad.c:372: phytium_keypad_inhibit(keypad);
input/keyboard/phytium-keypad.c:375:static int phytium_keypad_open(struct input_dev *dev)
input/keyboard/phytium-keypad.c:377: struct phytium_keypad *keypad = input_get_drvdata(dev);
input/keyboard/phytium-keypad.c:384: phytium_keypad_config(keypad);
input/keyboard/phytium-keypad.c:387: if ((phytium_read(keypad, KPDR) & keypad->rows_en_mask) == 0) {
input/keyboard/phytium-keypad.c:396: phytium_keypad_close(dev);
input/keyboard/phytium-keypad.c:401:static const struct acpi_device_id phytium_keypad_acpi_ids[] = {
input/keyboard/phytium-keypad.c:405:MODULE_DEVICE_TABLE(acpi, phytium_keypad_acpi_ids);
input/keyboard/phytium-keypad.c:409:static const struct of_device_id phytium_keypad_of_match[] = {
input/keyboard/phytium-keypad.c:410: { .compatible = "phytium,keypad", },
input/keyboard/phytium-keypad.c:413:MODULE_DEVICE_TABLE(of, phytium_keypad_of_match);
input/keyboard/phytium-keypad.c:416:static int phytium_keypad_probe(struct platform_device *pdev)
input/keyboard/phytium-keypad.c:419: struct phytium_keypad *keypad;
input/keyboard/phytium-keypad.c:450: phytium_keypad_check_for_events, 0);
input/keyboard/phytium-keypad.c:461: input_dev->open = phytium_keypad_open;
input/keyboard/phytium-keypad.c:462: input_dev->close = phytium_keypad_close;
input/keyboard/phytium-keypad.c:466: dev_err(&pdev->dev, "failed to parse phytium kp params\n");
input/keyboard/phytium-keypad.c:496: phytium_keypad_inhibit(keypad);
input/keyboard/phytium-keypad.c:498: error = devm_request_irq(&pdev->dev, irq, phytium_keypad_irq_handler, 0,
input/keyboard/phytium-keypad.c:518:static int phytium_keypad_remove(struct platform_device *pdev)
input/keyboard/phytium-keypad.c:520: struct phytium_keypad *keypad = platform_get_drvdata(pdev);
input/keyboard/phytium-keypad.c:529:static int phytium_keypad_suspend(struct device *dev)
input/keyboard/phytium-keypad.c:532: struct phytium_keypad *keypad = platform_get_drvdata(pdev);
input/keyboard/phytium-keypad.c:538: phytium_keypad_inhibit(keypad);
input/keyboard/phytium-keypad.c:548:static int phytium_keypad_resume(struct device *dev)
input/keyboard/phytium-keypad.c:551: struct phytium_keypad *keypad = platform_get_drvdata(pdev);
input/keyboard/phytium-keypad.c:561: phytium_keypad_config(keypad);
input/keyboard/phytium-keypad.c:569:static SIMPLE_DEV_PM_OPS(phytium_keypad_pm_ops, phytium_keypad_suspend, phytium_keypad_resume);
input/keyboard/phytium-keypad.c:571:static struct platform_driver phytium_keypad_driver = {
input/keyboard/phytium-keypad.c:573: .name = "phytium-keypad",
input/keyboard/phytium-keypad.c:574: .pm = &phytium_keypad_pm_ops,
input/keyboard/phytium-keypad.c:575: .of_match_table = of_match_ptr(phytium_keypad_of_match),
input/keyboard/phytium-keypad.c:576: .acpi_match_table = ACPI_PTR(phytium_keypad_acpi_ids),
input/keyboard/phytium-keypad.c:578: .probe = phytium_keypad_probe,
input/keyboard/phytium-keypad.c:579: .remove = phytium_keypad_remove,
input/keyboard/phytium-keypad.c:581:module_platform_driver(phytium_keypad_driver);
input/keyboard/phytium-keypad.c:583:MODULE_AUTHOR("Song Wenting <songwenting@phytium.com>");
input/keyboard/phytium-keypad.c:586:MODULE_ALIAS("platform:phytium-keypad");
input/keyboard/Makefile:73:obj-$(CONFIG_KEYBOARD_PHYTIUM) += phytium-keypad.o
char/hw_random/Kconfig:547: module will be called phytium-rng.
char/hw_random/phytium-rng.c:43:struct phytium_rng {
char/hw_random/phytium-rng.c:151:module_platform_driver(phytium_rng_driver);
char/hw_random/phytium-rng.c:155:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
char/hw_random/Makefile:50:obj-$(CONFIG_HW_RANDOM_PHYTIUM) += phytium-rng.o
char/ipmi/bt_bmc_phytium.c:515: { .compatible = "phytium,bt-bmc" },
char/ipmi/kcs_bmc_phytium.c:326:MODULE_AUTHOR("Cheng Quan <chengquan@phytium.com.cn>");
char/ipmi/Makefile:30:obj-$(CONFIG_PHYTIUM_KCS_IPMI_BMC) += kcs_bmc_phytium.o
char/ipmi/Makefile:31:obj-$(CONFIG_PHYTIUM_BT_IPMI_BMC) += bt_bmc_phytium.o
remoteproc/homo_remoteproc.c:5: * Author: Shaojun Yang <yangshaojun@phytium.com.cn>
remoteproc/homo_remoteproc.c:348:MODULE_AUTHOR("Shaojun Yang <yangshaojun@phytium.com.cn>");
mtd/nand/raw/phytium_nand_plat.c:20:#include "phytium_nand.h"
mtd/nand/raw/phytium_nand.h:445:int phytium_nand_resume(struct phytium_nfc *nfc);
mtd/nand/raw/phytium_nand.h:447:irqreturn_t phytium_nfc_isr(int irq, void *dev_id);
mtd/nand/raw/Makefile:62:obj-$(CONFIG_MTD_NAND_PHYTIUM) += phytium_nand.o
mtd/nand/raw/Makefile:63:obj-$(CONFIG_MTD_NAND_PHYTIUM_PCI) += phytium_nand_pci.o
mtd/nand/raw/Makefile:64:obj-$(CONFIG_MTD_NAND_PHYTIUM_PLAT) += phytium_nand_plat.o
pwm/Kconfig:581: will be called pwm-phytium.
pwm/pwm-phytium.c:50:struct phytium_pwm_state {
pwm/pwm-phytium.c:61:struct phytium_pwm_param {
pwm/pwm-phytium.c:70:struct phytium_pwm_variant {
pwm/pwm-phytium.c:82:struct phytium_pwm_channel {
pwm/pwm-phytium.c:88:struct phytium_pwm_chip {
pwm/pwm-phytium.c:562: .remove = pwm_phytium_remove,
pwm/pwm-phytium.c:564:module_platform_driver(pwm_phytium_driver);
pwm/pwm-phytium.c:567:MODULE_AUTHOR("Yang Liu <yangliu2021@phytium.com.cn>");
pwm/Makefile:59:obj-$(CONFIG_PWM_PHYTIUM) += pwm-phytium.o
mmc/host/phytium-mci-plat.c:160:static struct platform_driver phytium_mci_driver = {
mmc/host/phytium-mci-plat.c:161: .probe = phytium_mci_probe,
mmc/host/phytium-sdci.c:244: phytium_sdci_data_xfer_done(host, SDCI_BD_ISR_TRS_R, mrq, data);
,
mmc/host/phytium-sdci.c:884: phytium_sdci_data_xfer_done(host, SDCI_BD_ISR_EDTE,
mmc/host/phytium-mci.c:1557:EXPORT_SYMBOL(phytium_mci_common_probe);
mmc/host/phytium-mci.c:1561:MODULE_AUTHOR("Cheng Quan <chengquan@phytium.com.cn>");
mmc/host/Makefile:80:obj-$(CONFIG_MMC_PHYTIUM_SDCI) += phytium-sdci.o
mmc/host/Makefile:117:obj-$(CONFIG_MMC_PHYTIUM_MCI_PCI) += phytium-mci-pci.o phytium-mci.o
mmc/host/Makefile:118:obj-$(CONFIG_MMC_PHYTIUM_MCI_PLTFM) += phytium-mci-plat.o phytium-mci.o
w1/masters/Kconfig:85: will be called phytium-w1.
w1/masters/phytium_w1.c:639:module_platform_driver(phytium_w1m_driver);
w1/masters/phytium_w1.c:641:MODULE_AUTHOR("Zhu Mingshuai <zhumingshuai@phytium.com.cn>");
w1/masters/Makefile:16:obj-$(CONFIG_W1_MASTER_PHYTIUM) += phytium_w1.o
dma/phytium/phytium-ddmac.c:30:#include "phytium-ddmac.h"
dma/phytium/phytium-ddmac.h:151:struct phytium_ddma_device {
dma/phytium/phytium-ddmac.h:158: struct phytium_ddma_chan *chan;
dma/phytium/Makefile:1:obj-$(CONFIG_PHYTIUM_DDMA) += phytium-ddmac.o
dma/Makefile:90:obj-y += phytium/
hwspinlock/phytium_hwspinlock.c:30:static int phytium_hwspinlock_trylock(struct hwspinlock *lock)
hwspinlock/phytium_hwspinlock.c:223:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
hwspinlock/Makefile:14:obj-$(CONFIG_HWSPINLOCK_PHYTIUM) += phytium_hwspinlock.o
mfd/phytium_px210_i2s_lsd.c:13:struct phytium_px210_mfd {
mfd/phytium_px210_i2s_mmd.c:178: .remove = phytium_px210_mfd_remove,
mfd/phytium_px210_i2s_mmd.c:181:module_pci_driver(phytium_i2s_mmd_mfd_driver);
mfd/phytium_px210_i2s_mmd.c:183:MODULE_AUTHOR("Yiqun Zhang <zhangyiqun@phytium.com.cn>");
mfd/Makefile:271:obj-$(CONFIG_MFD_PHYTIUM_I2S_LSD) += phytium_px210_i2s_lsd.o
mfd/Makefile:272:obj-$(CONFIG_MFD_PHYTIUM_I2S_MMD) += phytium_px210_i2s_mmd.o
tty/serial/phytium-uart.c:20:#define DRV_NAME "phytium_uart"
tty/serial/phytium-uart.c:123:struct phytium_uart_port {
tty/serial/phytium-uart.c:920:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
tty/serial/Makefile:94:obj-$(CONFIG_SERIAL_PHYTIUM_PCI) += phytium-uart.o
gpio/gpio-phytium-core.h:42:struct phytium_gpio_ctx {
gpio/gpio-phytium-core.h:60:struct phytium_gpio {
gpio/gpio-phytium-core.c:348:phytium_gpio_irq_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force)
gpio/gpio-phytium-core.c:359:EXPORT_SYMBOL_GPL(phytium_gpio_irq_set_affinity);
gpio/Makefile:184:obj-$(CONFIG_GPIO_PHYTIUM_CORE) += gpio-phytium-core.o
gpio/Makefile:185:obj-$(CONFIG_GPIO_PHYTIUM_PCI) += gpio-phytium-pci.o
gpio/Makefile:186:obj-$(CONFIG_GPIO_PHYTIUM_PLAT) += gpio-phytium-platform.o
gpio/Makefile:187:obj-$(CONFIG_GPIO_PHYTIUM_SGPIO) += gpio-phytium-sgpio.o
irqchip/irq-phytium-ixic.c:35:static void phytium_ixic_irq_eoi(struct irq_data *d)
i
irqchip/irq-phytium-ixic.c:259: .acpi_match_table = phytium_ixic_acpi_ids,
irqchip/irq-phytium-ixic.c:261: .probe = phytium_ixic_acpi_probe,
irqchip/irq-phytium-ixic.c:263:builtin_platform_driver(phytium_ixic_driver);
irqchip/Makefile:117:obj-$(CONFIG_PHYTIUM_IXIC) += irq-phytium-ixic.o
pci/controller/pcie-phytium-register.h:7: * Yang Xun <yangxun@phytium.com.cn>
pci/controller/Kconfig:315: or End Point with different phytium firmware. But End Point mode only support
pci/controller/pcie-phytium-ep.h:7: * Yang Xun <yangxun@phytium.com.cn>
pci/controller/pcie-phytium-ep.h:18:#include "pcie-phytium-register.h"
pci/controller/pcie-phytium-ep.h:21:struct phytium_pcie_ep {
p
pci/controller/pcie-phytium-ep.c:472:module_platform_driver(phytium_pcie_ep_driver);
pci/controller/pcie-phytium-ep.c:475:MODULE_AUTHOR("Yang Xun <yangxun@phytium.com.cn>");
pci/controller/Makefile:35:obj-$(CONFIG_PCIE_PHYTIUM_EP) += pcie-phytium-ep.o
mailbox/phytium-mailbox.c:28:struct phytium_mbox_link {
mailbox/phytium-mailbox.c:34:struct phytium_mbox {
mailbox/phytium-mailbox.c:206: .acpi_match_table = ACPI_PTR(phytium_mbox_acpi_match),
mailbox/phytium-mailbox.c:210:module_platform_driver(phytium_mbox_driver);
mailbox/phytium-mailbox.c:214:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
mailbox/Makefile:58:obj-$(CONFIG_PHYTIUM_MBOX) += phytium-mailbox.o
edac/phytium_edac.c:18:#define EDAC_MOD_STR "phytium_edac"
edac/phytium_edac.c:481:module_platform_driver(phytium_edac_driver);
edac/phytium_edac.c:484:MODULE_AUTHOR("Huangjie <huangjie1663@phytium.com.cn>");
edac/Makefile:92:obj-$(CONFIG_EDAC_PHYTIUM) += phytium_edac.o
net/can/phytium/phytium_can_pci.c:9:#include "phytium_can.h"
net/can/phytium/Makefile:6:obj-$(CONFIG_CAN_PHYTIUM) += phytium_can.o
net/can/phytium/Makefile:7:obj-$(CONFIG_CAN_PHYTIUM_PLATFORM) += phytium_can_platform.o
net/can/phytium/Makefile:8:obj-$(CONFIG_CAN_PHYTIUM_PCI) += phytium_can_pci.o
net/can/Kconfig:182:source "drivers/net/can/phytium/Kconfig"
net/can/Makefile:32:obj-$(CONFIG_CAN_PHYTIUM) += phytium/
net/ethernet/stmicro/stmmac/dwmac-phytium.c:18:static int phytium_get_mac_mode(struct fwnode_handle *fwnode)
net/ethernet/stmicro/stmmac/dwmac-phytium.c:35:static int phytium_dwmac_acpi_phy(struct plat_stmmacenet_data *plat,
n
net/ethernet/stmicro/stmmac/dwmac-phytium.c:217:module_platform_driver(phytium_dwmac_driver);
net/ethernet/stmicro/stmmac/dwmac-phytium.c:219:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
net/ethernet/stmicro/stmmac/Makefile:21:obj-$(CONFIG_DWMAC_PHYTIUM) += dwmac-phytium.o
net/ethernet/cadence/macb.h:1410:enum phytium_type {
net/ethernet/cadence/macb.h:1416:struct phytium_platform_pdata {
net/ethernet/cadence/macb.h:1417: int phytium_dev_type;
net/ethernet/cadence/macb.h:1436: struct phytium_platform_pdata phytium_macb_pdata;
n
net/ethernet/cadence/macb_main.c:5634: if (pdata && pdata->phytium_macb_pdata.phytium_dev_type == PHYTIUM_DEV_3P0)
net/ethernet/cadence/macb_main.c:5635: bp->phy_interface = pdata->phytium_macb_pdata.phy_interface;
hwmon/Kconfig:2107: will be called tacho-phytium.
hwmon/tacho-phytium.c:70:struct phytium_tacho {
hwmon/tacho-phytium.c:84:static void phytium_tacho_init(struct phytium_tacho *tacho)
hwmon/tacho-phytium.c:109:static int phytium_get_fan_tach_rpm(struct phytium_tacho *priv)
hwmon/tacho-phytium.c:151: struct phytium_tacho *priv = dev_get_drvdata(dev);
h
hwmon/tacho-phytium.c:381: .pm = &phytium_tacho_pm,
hwmon/tacho-phytium.c:383: .acpi_match_table = ACPI_PTR(phytium_tacho_acpi_ids),
hwmon/tacho-phytium.c:387:module_platform_driver(phytium_tacho_driver);
hwmon/tacho-phytium.c:389:MODULE_AUTHOR("Zhang Yiqun <zhangyiqun@phytium.com.cn>");
hwmon/Makefile:197:obj-$(CONFIG_SENSORS_PHYTIUM) += tacho-phytium.o
gpu/drm/phytium/phytium_fb.c:10:#include "phytium_display_drv.h"
gpu/drm/phytium/phytium_dp.c:1347: sink_tps4 = drm_dp_tps4_supported(phytium_dp->dpcd);
gpu/drm/phytium/phytium_dp.c:1350: else if (phytium_dp->link_rate == 810000)
gpu/drm/phytium/phytium_dp.c:1353: sink_tps3 = drm_dp_tps3_supported(phytium_dp->dpcd);
gpu/drm/phytium/phytium_dp.c:1356: else if (phytium_dp->link_rate >= 540000)
gpu/drm/phytium/phytium_dp.c:1362:static bool phytium_dp_link_training_channel_equalization(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1370: phytium_dp_hw_set_lane_setting(phytium_dp, phytium_dp->link_rate,
gpu/drm/phytium/phytium_dp.c:1371: phytium_dp->train_set[0]);
gpu/drm/phytium/phytium_dp.c:1372: ret = phytium_dp_dpcd_set_lane_setting(phytium_dp, phytium_dp->train_set);
gpu/drm/phytium/phytium_dp.c:1374: DRM_ERROR("phytium_dp_dpcd_set_lane_setting fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1379: training_pattern = phytium_dp_get_training_pattern(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1380: phytium_dp_hw_set_train_pattern(phytium_dp, training_pattern);
gpu/drm/phytium/phytium_dp.c:1381: ret = phytium_dp_dpcd_set_train_pattern(phytium_dp, training_pattern);
gpu/drm/phytium/phytium_dp.c:1383: DRM_ERROR("phytium_dp_dpcd_set_train_pattern fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1388: drm_dp_link_train_channel_eq_delay(phytium_dp->dpcd);
gpu/drm/phytium/phytium_dp.c:1391: ret = drm_dp_dpcd_read(&phytium_dp->aux, DP_LANE0_1_STATUS,
gpu/drm/phytium/phytium_dp.c:1399: if (!drm_dp_clock_recovery_ok(link_status, phytium_dp->link_lane_count)) {
gpu/drm/phytium/phytium_dp.c:1404: if (drm_dp_channel_eq_ok(link_status, phytium_dp->link_lane_count)) {
gpu/drm/phytium/phytium_dp.c:1411: phytium_get_adjust_train(phytium_dp, link_status, phytium_dp->link_lane_count);
gpu/drm/phytium/phytium_dp.c:1412: phytium_dp_hw_set_lane_setting(phytium_dp, phytium_dp->link_rate,
gpu/drm/phytium/phytium_dp.c:1413: phytium_dp->train_set[0]);
gpu/drm/phytium/phytium_dp.c:1414: ret = phytium_dp_dpcd_set_lane_setting(phytium_dp, phytium_dp->train_set);
gpu/drm/phytium/phytium_dp.c:1416: DRM_ERROR("phytium_dp_dpcd_set_lane_setting fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1428:static void phytium_dp_train_retry_work_fn(struct work_struct *work)
gpu/drm/phytium/phytium_dp.c:1430: struct phytium_dp_device *phytium_dp = train_retry_to_dp_device(work);
gpu/drm/phytium/phytium_dp.c:1433: connector = &phytium_dp->connector;
gpu/drm/phytium/phytium_dp.c:1442:static int phytium_dp_rate_index(const int *rates, int len, int rate)
gpu/drm/phytium/phytium_dp.c:1453:int phytium_dp_get_link_train_fallback_values(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1457: if (phytium_dp->is_edp) {
gpu/drm/phytium/phytium_dp.c:1458: phytium_dp->train_retry_count++;
gpu/drm/phytium/phytium_dp.c:1460: phytium_dp->port);
gpu/drm/phytium/phytium_dp.c:1463: index = phytium_dp_rate_index(phytium_dp->common_rates,
gpu/drm/phytium/phytium_dp.c:1464: phytium_dp->num_common_rates,
gpu/drm/phytium/phytium_dp.c:1465: phytium_dp->link_rate);
gpu/drm/phytium/phytium_dp.c:1467: phytium_dp->link_rate = phytium_dp->common_rates[index - 1];
gpu/drm/phytium/phytium_dp.c:1468: } else if (phytium_dp->link_lane_count > 1) {
gpu/drm/phytium/phytium_dp.c:1469: phytium_dp->link_rate = phytium_dp->max_link_rate;
gpu/drm/phytium/phytium_dp.c:1470: phytium_dp->link_lane_count = phytium_dp->link_lane_count >> 1;
gpu/drm/phytium/phytium_dp.c:1472: phytium_dp->train_retry_count++;
gpu/drm/phytium/phytium_dp.c:1473: phytium_dp->link_rate = phytium_dp->max_link_rate;
gpu/drm/phytium/phytium_dp.c:1474: phytium_dp->link_lane_count = phytium_dp->max_link_lane_count;
gpu/drm/phytium/phytium_dp.c:1476: phytium_dp->port);
gpu/drm/phytium/phytium_dp.c:1486:phytium_dp_stop_link_train(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1491: phytium_dp_hw_set_train_pattern(phytium_dp, DP_TRAINING_PATTERN_DISABLE);
gpu/drm/phytium/phytium_dp.c:1493: ret = phytium_dp_dpcd_set_train_pattern(phytium_dp, DP_TRAINING_PATTERN_DISABLE);
gpu/drm/phytium/phytium_dp.c:1495: DRM_NOTE("phytium_dp_dpcd_set_train_pattern fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1502:int phytium_dp_start_link_train(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1506: phytium_dp_hw_disable_output(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1507: phytium_dp_hw_disable_input_source(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1508: phytium_dp_hw_disable_video(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1509: phytium_dp_hw_enable_input_source(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1510: phytium_dp_hw_enable_output(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1511: phytium_dp_dpcd_sink_dpms(phytium_dp, DRM_MODE_DPMS_OFF);
gpu/drm/phytium/phytium_dp.c:1512: phytium_dp_dpcd_sink_dpms(phytium_dp, DRM_MODE_DPMS_ON);
gpu/drm/phytium/phytium_dp.c:1514: if (!phytium_dp_link_training_clock_recovery(phytium_dp))
gpu/drm/phytium/phytium_dp.c:1517: if (!phytium_dp_link_training_channel_equalization(phytium_dp))
gpu/drm/phytium/phytium_dp.c:1520: ret = phytium_dp_stop_link_train(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1522: DRM_NOTE("phytium_dp_stop_link_train failed: ret = %d\n", ret);
gpu/drm/phytium/phytium_dp.c:1526: if (phytium_dp->trigger_train_fail) {
gpu/drm/phytium/phytium_dp.c:1527: phytium_dp->trigger_train_fail--;
gpu/drm/phytium/phytium_dp.c:1530: phytium_dp->train_retry_count = 0;
gpu/drm/phytium/phytium_dp.c:1533: phytium_dp->connector.base.id,
gpu/drm/phytium/phytium_dp.c:1534: phytium_dp->connector.name, phytium_dp->link_rate,
gpu/drm/phytium/phytium_dp.c:1535: phytium_dp->link_lane_count);
gpu/drm/phytium/phytium_dp.c:1541: phytium_dp->connector.base.id,
gpu/drm/phytium/phytium_dp.c:1542: phytium_dp->connector.name,
gpu/drm/phytium/phytium_dp.c:1543: phytium_dp->link_rate, phytium_dp->link_lane_count);
gpu/drm/phytium/phytium_dp.c:1545: ret = phytium_dp_stop_link_train(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1547: DRM_NOTE("phytium_dp_stop_link_train failed: ret = %d\n", ret);
gpu/drm/phytium/phytium_dp.c:1551: phytium_dp_get_link_train_fallback_values(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1552: if (phytium_dp->train_retry_count < 5)
gpu/drm/phytium/phytium_dp.c:1553: schedule_work(&phytium_dp->train_retry_work);
gpu/drm/phytium/phytium_dp.c:1556: phytium_dp->port);
gpu/drm/phytium/phytium_dp.c:1562:static bool phytium_dp_needs_link_retrain(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1568: ret = drm_dp_dpcd_read(&phytium_dp->aux, DP_LANE0_1_STATUS,
gpu/drm/phytium/phytium_dp.c:1575: if ((phytium_dp->link_rate == 0) || (phytium_dp->link_lane_count == 0)) {
gpu/drm/phytium/phytium_dp.c:1577: phytium_dp->link_rate, phytium_dp->link_lane_count);
gpu/drm/phytium/phytium_dp.c:1582: if (!drm_dp_clock_recovery_ok(link_status, phytium_dp->link_lane_count)) {
gpu/drm/phytium/phytium_dp.c:1587: if (!drm_dp_channel_eq_ok(link_status, phytium_dp->link_lane_count)) {
gpu/drm/phytium/phytium_dp.c:1592: if (!phytium_dp_hw_output_is_enable(phytium_dp)) {
gpu/drm/phytium/phytium_dp.c:1600:phytium_dp_get_sink_irq(struct phytium_dp_device *phytium_dp, u8 *sink_irq_vector)
gpu/drm/phytium/phytium_dp.c:1602: return drm_dp_dpcd_readb(&phytium_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR,
gpu/drm/phytium/phytium_dp.c:1606:static uint8_t phytium_dp_autotest_phy_pattern(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1608: union phytium_phy_tp phytium_phy_tp;
gpu/drm/phytium/phytium_dp.c:1622: ret = drm_dp_dpcd_read(&phytium_dp->aux, offset,
gpu/drm/phytium/phytium_dp.c:1623: &phytium_phy_tp.raw,
gpu/drm/phytium/phytium_dp.c:1624: sizeof(phytium_phy_tp));
gpu/drm/phytium/phytium_dp.c:1630: test_pattern = phytium_phy_tp.bits.PATTERN;
gpu/drm/phytium/phytium_dp.c:1633: ret = drm_dp_dpcd_read(&phytium_dp->aux, DP_TEST_80BIT_CUSTOM_PATTERN_7_0,
gpu/drm/phytium/phytium_dp.c:1643: ret = phytium_dp_dpcd_get_tp_link(phytium_dp, &phytium_dp->compliance.test_lane_count,
gpu/drm/phytium/phytium_dp.c:1644: &phytium_dp->compliance.test_link_rate);
gpu/drm/phytium/phytium_dp.c:1646: DRM_ERROR("phytium_dp_dpcd_get_tp_link fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1650: phytium_dp_hw_set_link(phytium_dp, phytium_dp->compliance.test_lane_count,
gpu/drm/phytium/phytium_dp.c:1651: phytium_dp->compliance.test_link_rate);
gpu/drm/phytium/phytium_dp.c:1652: ret = phytium_dp_dpcd_set_link(phytium_dp, phytium_dp->compliance.test_lane_count,
gpu/drm/phytium/phytium_dp.c:1653: phytium_dp->compliance.test_link_rate);
gpu/drm/phytium/phytium_dp.c:1655: DRM_ERROR("phytium_dp_dpcd_set_link fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1660: ret = phytium_dp_dpcd_get_adjust_request(phytium_dp,
gpu/drm/phytium/phytium_dp.c:1661: phytium_dp->compliance.test_lane_count);
gpu/drm/phytium/phytium_dp.c:1663: DRM_ERROR("phytium_dp_dpcd_get_adjust_request fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1666: phytium_dp_hw_set_lane_setting(phytium_dp, phytium_dp->compliance.test_link_rate,
gpu/drm/phytium/phytium_dp.c:1667: phytium_dp->train_set[0]);
gpu/drm/phytium/phytium_dp.c:1668: ret = phytium_dp_dpcd_set_lane_setting(phytium_dp, phytium_dp->train_set);
gpu/drm/phytium/phytium_dp.c:1670: DRM_ERROR("phytium_dp_dpcd_set_lane_setting fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1675: phytium_dp_hw_set_test_pattern(phytium_dp, phytium_dp->compliance.test_lane_count,
gpu/drm/phytium/phytium_dp.c:1678: ret = phytium_dp_dpcd_set_test_pattern(phytium_dp, test_pattern);
gpu/drm/phytium/phytium_dp.c:1680: DRM_ERROR("phytium_dp_dpcd_set_test_pattern fail: ret:%d\n", ret);
gpu/drm/phytium/phytium_dp.c:1687: phytium_dp_hw_set_test_pattern(phytium_dp, phytium_dp->compliance.test_lane_count,
gpu/drm/phytium/phytium_dp.c:1697:static void phytium_dp_handle_test_request(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1703: status = drm_dp_dpcd_readb(&phytium_dp->aux, DP_TEST_REQUEST, &request);
gpu/drm/phytium/phytium_dp.c:1718: response = phytium_dp_autotest_phy_pattern(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1726: status = drm_dp_dpcd_writeb(&phytium_dp->aux, DP_TEST_RESPONSE, response);
gpu/drm/phytium/phytium_dp.c:1732:static int phytium_dp_long_pulse(struct drm_connector *connector, bool hpd_raw_state)
gpu/drm/phytium/phytium_dp.c:1734: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_dp.c:1739: if (phytium_dp->is_edp)
gpu/drm/phytium/phytium_dp.c:1742: if (!phytium_dp_needs_link_retrain(phytium_dp)) {
gpu/drm/phytium/phytium_dp.c:1751: if (!phytium_dp->is_edp) {
gpu/drm/phytium/phytium_dp.c:1752: status = phytium_dp_detect_dpcd(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1756: index = phytium_dp->num_common_rates-1;
gpu/drm/phytium/phytium_dp.c:1757: phytium_dp->max_link_rate = phytium_dp->common_rates[index];
gpu/drm/phytium/phytium_dp.c:1758: phytium_dp->max_link_lane_count = phytium_dp->common_max_lane_count;
gpu/drm/phytium/phytium_dp.c:1759: phytium_dp->link_rate = phytium_dp->max_link_rate;
gpu/drm/phytium/phytium_dp.c:1760: phytium_dp->link_lane_count = phytium_dp->max_link_lane_count;
gpu/drm/phytium/phytium_dp.c:1762: phytium_dp->max_link_lane_count, phytium_dp->max_link_rate);
gpu/drm/phytium/phytium_dp.c:1764: video_enable = phytium_dp_hw_video_is_enable(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1765: phytium_dp_start_link_train(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1769: phytium_dp_hw_enable_video(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1777:static int phytium_dp_short_pulse(struct drm_connector *connector)
gpu/drm/phytium/phytium_dp.c:1779: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_dp.c:1785: if (phytium_dp_get_sink_irq(phytium_dp, &sink_irq_vector) &&
gpu/drm/phytium/phytium_dp.c:1787: drm_dp_dpcd_writeb(&phytium_dp->aux,
gpu/drm/phytium/phytium_dp.c:1791: phytium_dp_handle_test_request(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1795: if (!phytium_dp_needs_link_retrain(phytium_dp)) {
gpu/drm/phytium/phytium_dp.c:1800: video_enable = phytium_dp_hw_video_is_enable(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1801: phytium_dp_start_link_train(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1804: phytium_dp_hw_enable_video(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1811:void phytium_dp_hpd_poll_handler(struct phytium_display_private *priv)
gpu/drm/phytium/phytium_dp.c:1846:void phytium_dp_hpd_irq_setup(struct drm_device *dev, bool enable)
gpu/drm/phytium/phytium_dp.c:1848: struct phytium_dp_device *phytium_dp;
gpu/drm/phytium/phytium_dp.c:1850: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_dp.c:1859: phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:1860: if (!phytium_dp->dp_hpd_state.hpd_irq_enable) {
gpu/drm/phytium/phytium_dp.c:1861: hpd_raw_state_old = phytium_dp->dp_hpd_state.hpd_raw_state;
gpu/drm/phytium/phytium_dp.c:1862: phytium_dp_hw_get_hpd_state(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1863: if (phytium_dp->dp_hpd_state.hpd_event_state
gpu/drm/phytium/phytium_dp.c:1864: || phytium_dp->dp_hpd_state.hpd_irq_state
gpu/drm/phytium/phytium_dp.c:1865: || (hpd_raw_state_old != phytium_dp->dp_hpd_state.hpd_raw_state)) {
gpu/drm/phytium/phytium_dp.c:1872: phytium_dp_hpd_poll_handler(priv);
gpu/drm/phytium/phytium_dp.c:1876: phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:1877: phytium_dp_hw_hpd_irq_setup(phytium_dp, enable);
gpu/drm/phytium/phytium_dp.c:1881:void phytium_dp_hpd_work_func(struct work_struct *work)
gpu/drm/phytium/phytium_dp.c:1883: struct phytium_display_private *priv =
gpu/drm/phytium/phytium_dp.c:1884: container_of(work, struct phytium_display_private, hotplug_work);
gpu/drm/phytium/phytium_dp.c:1917: phytium_dp_hpd_irq_setup(dev, true);
gpu/drm/phytium/phytium_dp.c:1920:irqreturn_t phytium_dp_hpd_irq_handler(struct phytium_display_private *priv)
gpu/drm/phytium/phytium_dp.c:1923: struct phytium_dp_device *phytium_dp = NULL;
gpu/drm/phytium/phytium_dp.c:1930: phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:1931: if (phytium_dp->dp_hpd_state.hpd_irq_enable) {
gpu/drm/phytium/phytium_dp.c:1932: phytium_dp_hw_get_hpd_state(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1933: if (phytium_dp->dp_hpd_state.hpd_event_state
gpu/drm/phytium/phytium_dp.c:1934: || phytium_dp->dp_hpd_state.hpd_irq_state) {
gpu/drm/phytium/phytium_dp.c:1942: phytium_dp_hpd_irq_setup(dev, false);
gpu/drm/phytium/phytium_dp.c:1950:static void phytium_dp_fast_link_train_detect(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1952: phytium_dp->fast_train_support = !!(phytium_dp->dpcd[DP_MAX_DOWNSPREAD]
gpu/drm/phytium/phytium_dp.c:1955: phytium_dp->fast_train_support ? "supported" : "unsupported");
gpu/drm/phytium/phytium_dp.c:1958:bool phytium_dp_fast_link_train(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:1964: phytium_dp_hw_set_test_pattern(phytium_dp, phytium_dp->link_lane_count,
gpu/drm/phytium/phytium_dp.c:1968: phytium_dp_hw_set_link(phytium_dp, phytium_dp->link_lane_count, phytium_dp->link_rate);
gpu/drm/phytium/phytium_dp.c:1971: phytium_dp_hw_set_lane_setting(phytium_dp, phytium_dp->link_rate,
gpu/drm/phytium/phytium_dp.c:1972: phytium_dp->train_set[0]);
gpu/drm/phytium/phytium_dp.c:1975: phytium_dp_hw_set_train_pattern(phytium_dp, DP_TRAINING_PATTERN_1);
gpu/drm/phytium/phytium_dp.c:1978: training_pattern = phytium_dp_get_training_pattern(phytium_dp);
gpu/drm/phytium/phytium_dp.c:1979: phytium_dp_hw_set_train_pattern(phytium_dp, training_pattern);
gpu/drm/phytium/phytium_dp.c:1982: phytium_dp_hw_set_train_pattern(phytium_dp, DP_TRAINING_PATTERN_DISABLE);
gpu/drm/phytium/phytium_dp.c:1987: ret = drm_dp_dpcd_read(&phytium_dp->aux, DP_LANE0_1_STATUS,
gpu/drm/phytium/phytium_dp.c:1994: if (!drm_dp_clock_recovery_ok(link_status, phytium_dp->link_lane_count)) {
gpu/drm/phytium/phytium_dp.c:1999: if (!drm_dp_channel_eq_ok(link_status, phytium_dp->link_lane_count)) {
gpu/drm/phytium/phytium_dp.c:2009:phytium_connector_detect(struct drm_connector *connector, bool force)
gpu/drm/phytium/phytium_dp.c:2012: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_dp.c:2014: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/phytium_dp.c:2015: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_dp.c:2019: hpd_event_state = phytium_dp->dp_hpd_state.hpd_event_state;
gpu/drm/phytium/phytium_dp.c:2020: hpd_irq_state = phytium_dp->dp_hpd_state.hpd_irq_state;
gpu/drm/phytium/phytium_dp.c:2021: hpd_raw_state = phytium_dp->dp_hpd_state.hpd_raw_state;
gpu/drm/phytium/phytium_dp.c:2022: phytium_dp->dp_hpd_state.hpd_event_state = false;
gpu/drm/phytium/phytium_dp.c:2023: phytium_dp->dp_hpd_state.hpd_irq_state = false;
gpu/drm/phytium/phytium_dp.c:2027: status = phytium_dp_long_pulse(connector, hpd_raw_state);
gpu/drm/phytium/phytium_dp.c:2030: status = phytium_dp_short_pulse(connector);
gpu/drm/phytium/phytium_dp.c:2035: if ((!phytium_dp->is_edp) && (!hpd_raw_state))
gpu/drm/phytium/phytium_dp.c:2039: if ((status == connector_status_connected) && phytium_dp->has_audio)
gpu/drm/phytium/phytium_dp.c:2044: handle_plugged_change(phytium_dp, plugged);
gpu/drm/phytium/phytium_dp.c:2051:phytium_connector_destroy(struct drm_connector *connector)
gpu/drm/phytium/phytium_dp.c:2053: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_dp.c:2056: kfree(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2060:phytium_dp_connector_register(struct drm_connector *connector)
gpu/drm/phytium/phytium_dp.c:2063: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_dp.c:2065: phytium_dp_aux_init(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2066: if (phytium_dp->is_edp) {
gpu/drm/phytium/phytium_dp.c:2067: phytium_edp_init_connector(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2068: ret = phytium_edp_backlight_device_register(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2071: phytium_dp->port, ret);
gpu/drm/phytium/phytium_dp.c:2074: ret = phytium_debugfs_connector_add(connector);
gpu/drm/phytium/phytium_dp.c:2076: DRM_ERROR("failed to register phytium connector debugfs(ret=%d)\n", ret);
gpu/drm/phytium/phytium_dp.c:2082:phytium_dp_connector_unregister(struct drm_connector *connector)
gpu/drm/phytium/phytium_dp.c:2084: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_dp.c:2086: if (phytium_dp->is_edp) {
gpu/drm/phytium/phytium_dp.c:2087: phytium_edp_backlight_device_unregister(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2088: phytium_edp_fini_connector(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2090: drm_dp_aux_unregister(&phytium_dp->aux);
gpu/drm/phytium/phytium_dp.c:2093:static const struct drm_connector_funcs phytium_connector_funcs = {
gpu/drm/phytium/phytium_dp.c:2095: .detect = phytium_connector_detect,
gpu/drm/phytium/phytium_dp.c:2097: .destroy = phytium_connector_destroy,
gpu/drm/phytium/phytium_dp.c:2101: .late_register = phytium_dp_connector_register,
gpu/drm/phytium/phytium_dp.c:2102: .early_unregister = phytium_dp_connector_unregister,
gpu/drm/phytium/phytium_dp.c:2105:static void phytium_dp_encoder_mode_set(struct drm_encoder *encoder,
gpu/drm/phytium/phytium_dp.c:2109: struct phytium_dp_device *dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:2114:static void phytium_edp_panel_poweron(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2116: phytium_panel_poweron(&phytium_dp->panel);
gpu/drm/phytium/phytium_dp.c:2119:static void phytium_edp_panel_poweroff(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2121: phytium_panel_poweroff(&phytium_dp->panel);
gpu/drm/phytium/phytium_dp.c:2124:static void phytium_edp_backlight_on(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2126: phytium_panel_enable_backlight(&phytium_dp->panel);
gpu/drm/phytium/phytium_dp.c:2129:static void phytium_edp_backlight_off(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2131: phytium_panel_disable_backlight(&phytium_dp->panel);
gpu/drm/phytium/phytium_dp.c:2134:static void phytium_encoder_disable(struct drm_encoder *encoder)
gpu/drm/phytium/phytium_dp.c:2136: struct phytium_dp_device *phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:2138: if (phytium_dp->is_edp)
gpu/drm/phytium/phytium_dp.c:2139: phytium_edp_backlight_off(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2141: phytium_dp_hw_disable_video(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2145: if (phytium_dp->is_edp)
gpu/drm/phytium/phytium_dp.c:2146: phytium_edp_panel_poweroff(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2149:void phytium_dp_adjust_link_train_parameter(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2151: struct drm_display_info *display_info = &phytium_dp->connector.display_info;
gpu/drm/phytium/phytium_dp.c:2155: bs_request = phytium_dp->mode.crtc_htotal/(phytium_dp->mode.crtc_clock/1000);
gpu/drm/phytium/phytium_dp.c:2156: date_rate = (phytium_dp->mode.crtc_clock * display_info->bpc * 3)/8;
gpu/drm/phytium/phytium_dp.c:2159: bs_limit = 8192 / (phytium_dp->link_rate/1000);
gpu/drm/phytium/phytium_dp.c:2160: link_bw = phytium_dp->link_rate * phytium_dp->link_lane_count;
gpu/drm/phytium/phytium_dp.c:2163: phytium_dp->link_rate, phytium_dp->link_lane_count);
gpu/drm/phytium/phytium_dp.c:2165: phytium_dp->mode.crtc_clock, bs_request, bs_limit, rate);
gpu/drm/phytium/phytium_dp.c:2169: phytium_dp_get_link_train_fallback_values(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2173: phytium_dp->link_rate, phytium_dp->link_lane_count);
gpu/drm/phytium/phytium_dp.c:2176:static void phytium_encoder_enable(struct drm_encoder *encoder)
gpu/drm/phytium/phytium_dp.c:2178: struct phytium_dp_device *phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:2181: phytium_dp_hw_disable_video(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2183: if (phytium_dp->is_edp) {
gpu/drm/phytium/phytium_dp.c:2184: phytium_edp_panel_poweron(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2185: if (phytium_dp->fast_train_support)
gpu/drm/phytium/phytium_dp.c:2186: phytium_dp_fast_link_train(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2188: ret = phytium_dp_start_link_train(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2190: phytium_dp_fast_link_train_detect(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2192: phytium_dp_adjust_link_train_parameter(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2193: ret = phytium_dp_start_link_train(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2197: phytium_dp_hw_config_video(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2199: phytium_dp_hw_enable_video(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2200: if (phytium_dp->has_audio)
gpu/drm/phytium/phytium_dp.c:2201: phytium_dp_hw_enable_audio(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2204: if (phytium_dp->is_edp) {
gpu/drm/phytium/phytium_dp.c:2205: phytium_edp_backlight_on(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2210:phytium_encoder_mode_valid(struct drm_encoder *encoder, const struct drm_display_mode *mode)
gpu/drm/phytium/phytium_dp.c:2212: struct phytium_dp_device *phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:2213: struct drm_display_info *display_info = &phytium_dp->connector.display_info;
gpu/drm/phytium/phytium_dp.c:2233: actual = phytium_dp->max_link_rate * phytium_dp->max_link_lane_count / 100;
gpu/drm/phytium/phytium_dp.c:2242: (phytium_dp->native_mode.clock == mode->clock) &&
gpu/drm/phytium/phytium_dp.c:2243: (phytium_dp->native_mode.htotal == mode->htotal) &&
gpu/drm/phytium/phytium_dp.c:2244: (phytium_dp->native_mode.vtotal == mode->vtotal))
gpu/drm/phytium/phytium_dp.c:2259:static const struct drm_encoder_helper_funcs phytium_encoder_helper_funcs = {
gpu/drm/phytium/phytium_dp.c:2260: .mode_set = phytium_dp_encoder_mode_set,
gpu/drm/phytium/phytium_dp.c:2261: .disable = phytium_encoder_disable,
gpu/drm/phytium/phytium_dp.c:2262: .enable = phytium_encoder_enable,
gpu/drm/phytium/phytium_dp.c:2263: .mode_valid = phytium_encoder_mode_valid,
gpu/drm/phytium/phytium_dp.c:2266:void phytium_dp_encoder_destroy(struct drm_encoder *encoder)
gpu/drm/phytium/phytium_dp.c:2268: struct phytium_dp_device *phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:2270: phytium_dp_audio_codec_fini(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2274:static const struct drm_encoder_funcs phytium_encoder_funcs = {
gpu/drm/phytium/phytium_dp.c:2275: .destroy = phytium_dp_encoder_destroy,
gpu/drm/phytium/phytium_dp.c:2278:static const struct dp_audio_n_m phytium_dp_audio_n_m[] = {
gpu/drm/phytium/phytium_dp.c:2317:static int phytium_dp_audio_get_eld(struct device *dev, void *data, u8 *buf, size_t len)
gpu/drm/phytium/phytium_dp.c:2319: struct phytium_dp_device *phytium_dp = data;
gpu/drm/phytium/phytium_dp.c:2321: memcpy(buf, phytium_dp->connector.eld, min(sizeof(phytium_dp->connector.eld), len));
gpu/drm/phytium/phytium_dp.c:2327:static int phytium_dp_audio_digital_mute(struct device *dev, void *data, bool enable)
gpu/drm/phytium/phytium_dp.c:2329: struct phytium_dp_device *phytium_dp = data;
gpu/drm/phytium/phytium_dp.c:2331: phytium_dp_hw_audio_digital_mute(phytium_dp, enable);
gpu/drm/phytium/phytium_dp.c:2336:static int phytium_dp_audio_mute_stream(struct device *dev, void *data, bool enable, int direction)
gpu/drm/phytium/phytium_dp.c:2338: struct phytium_dp_device *phytium_dp = data;
gpu/drm/phytium/phytium_dp.c:2340: phytium_dp_hw_audio_digital_mute(phytium_dp, enable);
gpu/drm/phytium/phytium_dp.c:2346:const struct dp_audio_n_m *phytium_dp_audio_get_n_m(int link_rate, int sample_rate)
gpu/drm/phytium/phytium_dp.c:2350: for (i = 0; i < ARRAY_SIZE(phytium_dp_audio_n_m); i++) {
gpu/drm/phytium/phytium_dp.c:2351: if (sample_rate == phytium_dp_audio_n_m[i].sample_rate
gpu/drm/phytium/phytium_dp.c:2352: && link_rate == phytium_dp_audio_n_m[i].link_rate)
gpu/drm/phytium/phytium_dp.c:2353: return &phytium_dp_audio_n_m[i];
gpu/drm/phytium/phytium_dp.c:2359:static int phytium_dp_audio_hw_params(struct device *dev, void *data,
gpu/drm/phytium/phytium_dp.c:2363: struct phytium_dp_device *phytium_dp = data;
gpu/drm/phytium/phytium_dp.c:2377: ret = phytium_dp_hw_audio_hw_params(phytium_dp, audio_info);
gpu/drm/phytium/phytium_dp.c:2383:static void phytium_dp_audio_shutdown(struct device *dev, void *data)
gpu/drm/phytium/phytium_dp.c:2385: struct phytium_dp_device *phytium_dp = data;
gpu/drm/phytium/phytium_dp.c:2387: phytium_dp_hw_audio_shutdown(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2390:static void handle_plugged_change(struct phytium_dp_device *phytium_dp, bool plugged)
gpu/drm/phytium/phytium_dp.c:2392: if (phytium_dp->plugged_cb && phytium_dp->codec_dev)
gpu/drm/phytium/phytium_dp.c:2393: phytium_dp->plugged_cb(phytium_dp->codec_dev, plugged);
gpu/drm/phytium/phytium_dp.c:2396:static int phytium_dp_audio_hook_plugged_cb(struct device *dev, void *data,
gpu/drm/phytium/phytium_dp.c:2400: struct phytium_dp_device *phytium_dp = data;
gpu/drm/phytium/phytium_dp.c:2403: phytium_dp->plugged_cb = fn;
gpu/drm/phytium/phytium_dp.c:2404: phytium_dp->codec_dev = codec_dev;
gpu/drm/phytium/phytium_dp.c:2406: if ((phytium_dp->connector.status == connector_status_connected) && phytium_dp->has_audio)
gpu/drm/phytium/phytium_dp.c:2411: handle_plugged_change(phytium_dp, plugged);
gpu/drm/phytium/phytium_dp.c:2416:static const struct hdmi_codec_ops phytium_audio_codec_ops = {
gpu/drm/phytium/phytium_dp.c:2417: .hw_params = phytium_dp_audio_hw_params,
gpu/drm/phytium/phytium_dp.c:2418: .audio_shutdown = phytium_dp_audio_shutdown,
gpu/drm/phytium/phytium_dp.c:2420: .digital_mute = phytium_dp_audio_digital_mute,
gpu/drm/phytium/phytium_dp.c:2422: .mute_stream = phytium_dp_audio_mute_stream,
gpu/drm/phytium/phytium_dp.c:2424: .get_eld = phytium_dp_audio_get_eld,
gpu/drm/phytium/phytium_dp.c:2425: .hook_plugged_cb = phytium_dp_audio_hook_plugged_cb,
gpu/drm/phytium/phytium_dp.c:2428:static int phytium_dp_audio_codec_init(struct phytium_dp_device *phytium_dp,
gpu/drm/phytium/phytium_dp.c:2431: struct device *dev = phytium_dp->dev->dev;
gpu/drm/phytium/phytium_dp.c:2435: .ops = &phytium_audio_codec_ops,
gpu/drm/phytium/phytium_dp.c:2437: .data = phytium_dp,
gpu/drm/phytium/phytium_dp.c:2440: phytium_dp->audio_pdev = platform_device_register_data(dev, HDMI_CODEC_DRV_NAME,
gpu/drm/phytium/phytium_dp.c:2444: return PTR_ERR_OR_ZERO(phytium_dp->audio_pdev);
gpu/drm/phytium/phytium_dp.c:2447:static void phytium_dp_audio_codec_fini(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2449: if (!PTR_ERR_OR_ZERO(phytium_dp->audio_pdev))
gpu/drm/phytium/phytium_dp.c:2450: platform_device_unregister(phytium_dp->audio_pdev);
gpu/drm/phytium/phytium_dp.c:2451: phytium_dp->audio_pdev = NULL;
gpu/drm/phytium/phytium_dp.c:2454:static long phytium_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
gpu/drm/phytium/phytium_dp.c:2456: struct phytium_dp_device *phytium_dp = container_of(aux, struct phytium_dp_device, aux);
gpu/drm/phytium/phytium_dp.c:2468: ret = phytium_dp_hw_aux_transfer_write(phytium_dp, msg);
gpu/drm/phytium/phytium_dp.c:2473: ret = phytium_dp_hw_aux_transfer_read(phytium_dp, msg);
gpu/drm/phytium/phytium_dp.c:2484:static void phytium_dp_aux_init(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2486: drm_dp_aux_init(&phytium_dp->aux);
gpu/drm/phytium/phytium_dp.c:2487: phytium_dp->aux.name = kasprintf(GFP_KERNEL, "dp-%d", phytium_dp->port);
gpu/drm/phytium/phytium_dp.c:2488: phytium_dp->aux.transfer = phytium_dp_aux_transfer;
gpu/drm/phytium/phytium_dp.c:2491:int phytium_get_encoder_crtc_mask(struct phytium_dp_device *phytium_dp, int port)
gpu/drm/phytium/phytium_dp.c:2493: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/phytium_dp.c:2494: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_dp.c:2507:static bool phytium_dp_is_edp(struct phytium_dp_device *phytium_dp, int port)
gpu/drm/phytium/phytium_dp.c:2509: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/phytium_dp.c:2510: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_dp.c:2518:static bool phytium_edp_init_connector(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2521: struct drm_connector *connector = &phytium_dp->connector;
gpu/drm/phytium/phytium_dp.c:2523: phytium_edp_panel_poweron(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2525: status = phytium_dp_detect_dpcd(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2531: phytium_dp->edp_edid = drm_get_edid(connector, &phytium_dp->aux.ddc);
gpu/drm/phytium/phytium_dp.c:2532: if (!phytium_dp->edp_edid) {
gpu/drm/phytium/phytium_dp.c:2538: phytium_dp->max_link_rate = phytium_dp->common_rates[phytium_dp->num_common_rates-1];
gpu/drm/phytium/phytium_dp.c:2539: phytium_dp->max_link_lane_count = phytium_dp->common_max_lane_count;
gpu/drm/phytium/phytium_dp.c:2540: phytium_dp->link_rate = phytium_dp->max_link_rate;
gpu/drm/phytium/phytium_dp.c:2541: phytium_dp->link_lane_count = phytium_dp->max_link_lane_count;
gpu/drm/phytium/phytium_dp.c:2543: phytium_dp->max_link_lane_count, phytium_dp->max_link_rate);
gpu/drm/phytium/phytium_dp.c:2548:static void phytium_edp_fini_connector(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_dp.c:2550: if (phytium_dp->edp_edid)
gpu/drm/phytium/phytium_dp.c:2551: kfree(phytium_dp->edp_edid);
gpu/drm/phytium/phytium_dp.c:2553: phytium_dp->edp_edid = NULL;
gpu/drm/phytium/phytium_dp.c:2554: phytium_edp_panel_poweroff(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2559:int phytium_dp_resume(struct drm_device *drm_dev)
gpu/drm/phytium/phytium_dp.c:2561: struct phytium_dp_device *phytium_dp;
gpu/drm/phytium/phytium_dp.c:2566: phytium_dp = encoder_to_dp_device(encoder);
gpu/drm/phytium/phytium_dp.c:2567: if (phytium_dp->is_edp) {
gpu/drm/phytium/phytium_dp.c:2568: phytium_edp_backlight_off(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2569: phytium_edp_panel_poweroff(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2571: ret = phytium_dp_hw_init(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2573: DRM_ERROR("failed to initialize dp %d\n", phytium_dp->port);
gpu/drm/phytium/phytium_dp.c:2581:int phytium_dp_init(struct drm_device *dev, int port)
gpu/drm/phytium/phytium_dp.c:2583: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_dp.c:2584: struct phytium_dp_device *phytium_dp = NULL;
gpu/drm/phytium/phytium_dp.c:2588: phytium_dp = kzalloc(sizeof(*phytium_dp), GFP_KERNEL);
gpu/drm/phytium/phytium_dp.c:2589: if (!phytium_dp) {
gpu/drm/phytium/phytium_dp.c:2594: phytium_dp->dev = dev;
gpu/drm/phytium/phytium_dp.c:2595: phytium_dp->port = port;
gpu/drm/phytium/phytium_dp.c:2598: px210_dp_func_register(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2602: pe220x_dp_func_register(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2607: if (phytium_dp_is_edp(phytium_dp, port)) {
gpu/drm/phytium/phytium_dp.c:2608: phytium_dp->is_edp = true;
gpu/drm/phytium/phytium_dp.c:2610: phytium_dp_panel_init_backlight_funcs(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2611: phytium_edp_backlight_off(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2612: phytium_edp_panel_poweroff(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2614: phytium_dp->is_edp = false;
gpu/drm/phytium/phytium_dp.c:2618: ret = phytium_dp_hw_init(phytium_dp);
gpu/drm/phytium/phytium_dp.c:2620: DRM_ERROR("failed to initialize dp %d\n", phytium_dp->port);
gpu/drm/phytium/phytium_dp.c:2624: ret = drm_encoder_init(dev, &phytium_dp->encoder,
gpu/drm/phytium/phytium_dp.c:2625: &phytium_encoder_funcs,
gpu/drm/phytium/phytium_dp.c:2631: drm_encoder_helper_add(&phytium_dp->encoder, &phytium_encoder_helper_funcs);
gpu/drm/phytium/phytium_dp.c:2632: phytium_dp->encoder.possible_crtcs = phytium_get_encoder_crtc_mask(phytium_dp, port);
gpu/drm/phytium/phytium_dp.c:2634: phytium_dp->connector.dpms = DRM_MODE_DPMS_OFF;
gpu/drm/phytium/phytium_dp.c:2635: phytium_dp->connector.polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
gpu/drm/phytium/phytium_dp.c:2636: ret = drm_connector_init(dev, &phytium_dp->connector, &phytium_connector_funcs,
gpu/drm/phytium/phytium_dp.c:2642: drm_connector_helper_add(&phytium_dp->connector, &phytium_connector_helper_funcs);
gpu/drm/phytium/phytium_dp.c:2643: drm_connector_attach_encoder(&phytium_dp->connector, &phytium_dp->encoder);
gpu/drm/phytium/phytium_dp.c:2645: ret = phytium_dp_audio_codec_init(phytium_dp, port);
gpu/drm/phytium/phytium_dp.c:2651: phytium_dp->train_retry_count = 0;
gpu/drm/phytium/phytium_dp.c:2652: INIT_WORK(&phytium_dp->train_retry_work, phytium_dp_train_retry_work_fn);
gpu/drm/phytium/phytium_dp.c:2653: drm_connector_register(&phytium_dp->connector);
gpu/drm/phytium/phytium_dp.c:2659: kfree(phytium_dp);
gpu/drm/phytium/phytium_platform.h:10:struct phytium_platform_private {
gpu/drm/phytium/phytium_platform.h:11: struct phytium_display_private base;
gpu/drm/phytium/phytium_platform.h:14:#define to_platform_priv(priv) container_of(priv, struct phytium_platform_private, base)
gpu/drm/phytium/phytium_platform.h:16:extern struct platform_driver phytium_platform_driver;
gpu/drm/phytium/phytium_gem.c:17:#include "phytium_display_drv.h"
gpu/drm/phytium/phytium_gem.c:18:#include "phytium_gem.h"
gpu/drm/phytium/phytium_gem.c:22:int phytium_memory_pool_alloc(struct phytium_display_private *priv, void **pvaddr,
gpu/drm/phytium/phytium_gem.c:37:void phytium_memory_pool_free(struct phytium_display_private *priv, void *vaddr, uint64_t size)
gpu/drm/phytium/phytium_gem.c:42:int phytium_memory_pool_init(struct device *dev, struct phytium_display_private *priv)
gpu/drm/phytium/phytium_gem.c:70:void phytium_memory_pool_fini(struct device *dev, struct phytium_display_private *priv)
gpu/drm/phytium/phytium_gem.c:76:phytium_gem_prime_get_sg_table(struct drm_gem_object *obj)
gpu/drm/phytium/phytium_gem.c:78: struct phytium_gem_object *phytium_gem_obj = to_phytium_gem_obj(obj);
gpu/drm/phytium/phytium_gem.c:90: if ((phytium_gem_obj->memory_type == MEMORY_TYPE_VRAM) ||
gpu/drm/phytium/phytium_gem.c:91: (phytium_gem_obj->memory_type == MEMORY_TYPE_SYSTEM_CARVEOUT)) {
gpu/drm/phytium/phytium_gem.c:97: page = phys_to_page(phytium_gem_obj->phys_addr);
gpu/drm/phytium/phytium_gem.c:98: sg_set_page(sgt->sgl, page, PAGE_ALIGN(phytium_gem_obj->size), 0);
gpu/drm/phytium/phytium_gem.c:99: } else if (phytium_gem_obj->memory_type == MEMORY_TYPE_SYSTEM_UNIFIED) {
gpu/drm/phytium/phytium_gem.c:100: ret = dma_get_sgtable_attrs(dev->dev, sgt, phytium_gem_obj->vaddr,
gpu/drm/phytium/phytium_gem.c:101: phytium_gem_obj->iova, phytium_gem_obj->size,
gpu/drm/phytium/phytium_gem.c:116:phytium_gem_prime_import_sg_table(struct drm_device *dev,
gpu/drm/phytium/phytium_gem.c:120: struct phytium_gem_object *phytium_gem_obj = NULL;
gpu/drm/phytium/phytium_gem.c:125: phytium_gem_obj = kzalloc(sizeof(*phytium_gem_obj), GFP_KERNEL);
gpu/drm/phytium/phytium_gem.c:126: if (!phytium_gem_obj) {
gpu/drm/phytium/phytium_gem.c:127: DRM_ERROR("failed to allocate phytium_gem_obj\n");
gpu/drm/phytium/phytium_gem.c:132: ret = drm_gem_object_init(dev, &phytium_gem_obj->base, attach->dmabuf->size);
gpu/drm/phytium/phytium_gem.c:148: phytium_gem_obj->iova = sg_dma_address(sgt->sgl);
gpu/drm/phytium/phytium_gem.c:149: phytium_gem_obj->sgt = sgt;
gpu/drm/phytium/phytium_gem.c:151: return &phytium_gem_obj->base;
gpu/drm/phytium/phytium_gem.c:153: drm_gem_object_release(&phytium_gem_obj->base);
gpu/drm/phytium/phytium_gem.c:155: kfree(phytium_gem_obj);
gpu/drm/phytium/phytium_gem.c:160:void *phytium_gem_prime_vmap(struct drm_gem_object *obj)
gpu/drm/phytium/phytium_gem.c:162: struct phytium_gem_object *phytium_obj = to_phytium_gem_obj(obj);
gpu/drm/phytium/phytium_gem.c:164: return phytium_obj->vaddr;
gpu/drm/phytium/phytium_gem.c:167:void phytium_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
gpu/drm/phytium/phytium_gem.c:172:int phytium_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
gpu/drm/phytium/phytium_gem.c:180: return phytium_gem_mmap_obj(obj, vma);
gpu/drm/phytium/phytium_gem.c:183:static void phytium_dma_callback(void *callback_param)
gpu/drm/phytium/phytium_gem.c:190:int phytium_dma_transfer(struct drm_device *drm_dev, int dev_to_mem, void *addr,
gpu/drm/phytium/phytium_gem.c:193: struct phytium_display_private *priv = drm_dev->dev_private;
gpu/drm/phytium/phytium_gem.c:256: desc->callback = phytium_dma_callback;
gpu/drm/phytium/phytium_gem.c:277:int phytium_gem_suspend(struct drm_device *drm_dev)
gpu/drm/phytium/phytium_gem.c:279: struct phytium_display_private *priv = drm_dev->dev_private;
gpu/drm/phytium/phytium_gem.c:280: struct phytium_gem_object *phytium_gem_obj = NULL;
gpu/drm/phytium/phytium_gem.c:283: list_for_each_entry(phytium_gem_obj, &priv->gem_list_head, list) {
gpu/drm/phytium/phytium_gem.c:284: if (phytium_gem_obj->memory_type != MEMORY_TYPE_VRAM)
gpu/drm/phytium/phytium_gem.c:287: phytium_gem_obj->vaddr_save = vmalloc(phytium_gem_obj->size);
gpu/drm/phytium/phytium_gem.c:288: if (!phytium_gem_obj->vaddr_save)
gpu/drm/phytium/phytium_gem.c:292: ret = phytium_dma_transfer(drm_dev, 1, phytium_gem_obj->vaddr_save,
gpu/drm/phytium/phytium_gem.c:293: phytium_gem_obj->iova, phytium_gem_obj->size);
gpu/drm/phytium/phytium_gem.c:296: memcpy(phytium_gem_obj->vaddr_save, phytium_gem_obj->vaddr,
gpu/drm/phytium/phytium_gem.c:297: phytium_gem_obj->size);
gpu/drm/phytium/phytium_gem.c:302: list_for_each_entry(phytium_gem_obj, &priv->gem_list_head, list) {
gpu/drm/phytium/phytium_gem.c:303: if (phytium_gem_obj->memory_type != MEMORY_TYPE_VRAM)
gpu/drm/phytium/phytium_gem.c:306: if (phytium_gem_obj->vaddr_save) {
gpu/drm/phytium/phytium_gem.c:307: vfree(phytium_gem_obj->vaddr_save);
gpu/drm/phytium/phytium_gem.c:308: phytium_gem_obj->vaddr_save = NULL;
gpu/drm/phytium/phytium_gem.c:314:void phytium_gem_resume(struct drm_device *drm_dev)
gpu/drm/phytium/phytium_gem.c:316: struct phytium_display_private *priv = drm_dev->dev_private;
gpu/drm/phytium/phytium_gem.c:317: struct phytium_gem_object *phytium_gem_obj = NULL;
gpu/drm/phytium/phytium_gem.c:319: list_for_each_entry(phytium_gem_obj, &priv->gem_list_head, list) {
gpu/drm/phytium/phytium_gem.c:320: if (phytium_gem_obj->memory_type != MEMORY_TYPE_VRAM)
gpu/drm/phytium/phytium_gem.c:323: memcpy(phytium_gem_obj->vaddr, phytium_gem_obj->vaddr_save, phytium_gem_obj->size);
gpu/drm/phytium/phytium_gem.c:324: vfree(phytium_gem_obj->vaddr_save);
gpu/drm/phytium/phytium_gem.c:325: phytium_gem_obj->vaddr_save = NULL;
gpu/drm/phytium/phytium_gem.c:329:void phytium_gem_free_object(struct drm_gem_object *obj)
gpu/drm/phytium/phytium_gem.c:331: struct phytium_gem_object *phytium_gem_obj = to_phytium_gem_obj(obj);
gpu/drm/phytium/phytium_gem.c:333: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_gem.c:334: uint64_t size = phytium_gem_obj->size;
gpu/drm/phytium/phytium_gem.c:336: DRM_DEBUG_KMS("free phytium_gem_obj iova:0x%pa size:0x%lx\n",
gpu/drm/phytium/phytium_gem.c:337: &phytium_gem_obj->iova, phytium_gem_obj->size);
gpu/drm/phytium/phytium_gem.c:338: if (phytium_gem_obj->vaddr) {
gpu/drm/phytium/phytium_gem.c:339: if (phytium_gem_obj->memory_type == MEMORY_TYPE_VRAM) {
gpu/drm/phytium/phytium_gem.c:340: phytium_memory_pool_free(priv, phytium_gem_obj->vaddr, size);
gpu/drm/phytium/phytium_gem.c:342: } else if (phytium_gem_obj->memory_type == MEMORY_TYPE_SYSTEM_CARVEOUT) {
gpu/drm/phytium/phytium_gem.c:343: dma_unmap_page(dev->dev, phytium_gem_obj->iova, size, DMA_TO_DEVICE);
gpu/drm/phytium/phytium_gem.c:344: phytium_memory_pool_free(priv, phytium_gem_obj->vaddr, size);
gpu/drm/phytium/phytium_gem.c:346: } else if (phytium_gem_obj->memory_type == MEMORY_TYPE_SYSTEM_UNIFIED) {
gpu/drm/phytium/phytium_gem.c:347: dma_free_attrs(dev->dev, size, phytium_gem_obj->vaddr,
gpu/drm/phytium/phytium_gem.c:348: phytium_gem_obj->iova, 0);
gpu/drm/phytium/phytium_gem.c:351: list_del(&phytium_gem_obj->list);
gpu/drm/phytium/phytium_gem.c:353: drm_prime_gem_destroy(obj, phytium_gem_obj->sgt);
gpu/drm/phytium/phytium_gem.c:355: kfree(phytium_gem_obj);
gpu/drm/phytium/phytium_gem.c:358:int phytium_gem_mmap_obj(struct drm_gem_object *obj, struct vm_area_struct *vma)
gpu/drm/phytium/phytium_gem.c:361: struct phytium_gem_object *phytium_gem_obj = to_phytium_gem_obj(obj);
gpu/drm/phytium/phytium_gem.c:362: unsigned long pfn = PHYS_PFN(phytium_gem_obj->phys_addr);
gpu/drm/phytium/phytium_gem.c:372: if (phytium_gem_obj->memory_type == MEMORY_TYPE_VRAM) {
gpu/drm/phytium/phytium_gem.c:376: } else if (phytium_gem_obj->memory_type == MEMORY_TYPE_SYSTEM_CARVEOUT) {
gpu/drm/phytium/phytium_gem.c:379: } else if (phytium_gem_obj->memory_type == MEMORY_TYPE_SYSTEM_UNIFIED) {
gpu/drm/phytium/phytium_gem.c:380: ret = dma_mmap_attrs(obj->dev->dev, vma, phytium_gem_obj->vaddr,
gpu/drm/phytium/phytium_gem.c:381: phytium_gem_obj->iova, vma->vm_end - vma->vm_start, 0);
gpu/drm/phytium/phytium_gem.c:389:int phytium_gem_mmap(struct file *filp, struct vm_area_struct *vma)
gpu/drm/phytium/phytium_gem.c:397: return phytium_gem_mmap_obj(vma->vm_private_data, vma);
gpu/drm/phytium/phytium_gem.c:400:int phytium_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev, uint32_t handle)
gpu/drm/phytium/phytium_gem.c:406:static const struct vm_operations_struct phytium_vm_ops = {
gpu/drm/phytium/phytium_gem.c:411:static const struct drm_gem_object_funcs phytium_drm_gem_object_funcs = {
gpu/drm/phytium/phytium_gem.c:412: .free = phytium_gem_free_object,
gpu/drm/phytium/phytium_gem.c:413: .get_sg_table = phytium_gem_prime_get_sg_table,
gpu/drm/phytium/phytium_gem.c:414: .vmap = phytium_gem_prime_vmap,
gpu/drm/phytium/phytium_gem.c:415: .vunmap = phytium_gem_prime_vunmap,
gpu/drm/phytium/phytium_gem.c:416: .vm_ops = &phytium_vm_ops,
gpu/drm/phytium/phytium_gem.c:420:struct phytium_gem_object *phytium_gem_create_object(struct drm_device *dev, unsigned long size)
gpu/drm/phytium/phytium_gem.c:422: struct phytium_gem_object *phytium_gem_obj = NULL;
gpu/drm/phytium/phytium_gem.c:423: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_gem.c:427: phytium_gem_obj = kzalloc(sizeof(*phytium_gem_obj), GFP_KERNEL);
gpu/drm/phytium/phytium_gem.c:428: if (!phytium_gem_obj) {
gpu/drm/phytium/phytium_gem.c:429: DRM_ERROR("failed to allocate phytium_gem_obj\n");
gpu/drm/phytium/phytium_gem.c:434: ret = drm_gem_object_init(dev, &phytium_gem_obj->base, size);
gpu/drm/phytium/phytium_gem.c:441: ret = phytium_memory_pool_alloc(priv, &phytium_gem_obj->vaddr,
gpu/drm/phytium/phytium_gem.c:442: &phytium_gem_obj->phys_addr, size);
gpu/drm/phytium/phytium_gem.c:447: phytium_gem_obj->iova = phytium_gem_obj->phys_addr;
gpu/drm/phytium/phytium_gem.c:448: phytium_gem_obj->memory_type = MEMORY_TYPE_VRAM;
gpu/drm/phytium/phytium_gem.c:451: ret = phytium_memory_pool_alloc(priv, &phytium_gem_obj->vaddr,
gpu/drm/phytium/phytium_gem.c:452: &phytium_gem_obj->phys_addr, size);
gpu/drm/phytium/phytium_gem.c:457: page = phys_to_page(phytium_gem_obj->phys_addr);
gpu/drm/phytium/phytium_gem.c:458: phytium_gem_obj->iova = dma_map_page(dev->dev, page, 0, size, DMA_TO_DEVICE);
gpu/drm/phytium/phytium_gem.c:459: if (dma_mapping_error(dev->dev, phytium_gem_obj->iova)) {
gpu/drm/phytium/phytium_gem.c:461: phytium_memory_pool_free(priv, phytium_gem_obj->vaddr, size);
gpu/drm/phytium/phytium_gem.c:465: phytium_gem_obj->memory_type = MEMORY_TYPE_SYSTEM_CARVEOUT;
gpu/drm/phytium/phytium_gem.c:468: phytium_gem_obj->vaddr = dma_alloc_attrs(dev->dev, size, &phytium_gem_obj->iova,
gpu/drm/phytium/phytium_gem.c:470: if (!phytium_gem_obj->vaddr) {
gpu/drm/phytium/phytium_gem.c:475: phytium_gem_obj->memory_type = MEMORY_TYPE_SYSTEM_UNIFIED;
gpu/drm/phytium/phytium_gem.c:484: phytium_gem_obj->base.funcs = &phytium_drm_gem_object_funcs;
gpu/drm/phytium/phytium_gem.c:487: phytium_gem_obj->size = size;
gpu/drm/phytium/phytium_gem.c:488: list_add_tail(&phytium_gem_obj->list, &priv->gem_list_head);
gpu/drm/phytium/phytium_gem.c:489: DRM_DEBUG_KMS("phytium_gem_obj iova:0x%pa size:0x%lx\n",
gpu/drm/phytium/phytium_gem.c:490: &phytium_gem_obj->iova, phytium_gem_obj->size);
gpu/drm/phytium/phytium_gem.c:491: return phytium_gem_obj;
gpu/drm/phytium/phytium_gem.c:495: drm_gem_object_put(&phytium_gem_obj->base);
gpu/drm/phytium/phytium_gem.c:497: drm_gem_object_unreference_unlocked(&phytium_gem_obj->base);
gpu/drm/phytium/phytium_gem.c:502: kfree(phytium_gem_obj);
gpu/drm/phytium/phytium_gem.c:507:int phytium_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
gpu/drm/phytium/phytium_gem.c:511: struct phytium_gem_object *phytium_gem_obj = NULL;
gpu/drm/phytium/phytium_gem.c:517: phytium_gem_obj = phytium_gem_create_object(dev, size);
gpu/drm/phytium/phytium_gem.c:518: if (IS_ERR(phytium_gem_obj))
gpu/drm/phytium/phytium_gem.c:519: return PTR_ERR(phytium_gem_obj);
gpu/drm/phytium/phytium_gem.c:520: ret = drm_gem_handle_create(file, &phytium_gem_obj->base, &args->handle);
gpu/drm/phytium/phytium_gem.c:526: drm_gem_object_put(&phytium_gem_obj->base);
gpu/drm/phytium/phytium_gem.c:528: drm_gem_object_unreference_unlocked(&phytium_gem_obj->base);
gpu/drm/phytium/phytium_gem.c:533: phytium_gem_free_object(&phytium_gem_obj->base);
gpu/drm/phytium/phytium_debugfs.h:10:int phytium_debugfs_connector_add(struct drm_connector *connector);
gpu/drm/phytium/phytium_debugfs.h:11:int phytium_debugfs_display_register(struct phytium_display_private *priv);
gpu/drm/phytium/pe220x_dp.c:8:#include "phytium_display_drv.h"
gpu/drm/phytium/pe220x_dp.c:10:#include "phytium_dp.h"
gpu/drm/phytium/pe220x_dp.c:95:static int pe220x_dp_hw_set_phy_lane_and_rate(struct phytium_dp_device *phytium_dp,
gpu/drm/phytium/pe220x_dp.c:98: int port = phytium_dp->port%2;
gpu/drm/phytium/pe220x_dp.c:104: for (i = 0; i < phytium_dp->source_max_lane_count; i++)
gpu/drm/phytium/pe220x_dp.c:106: phytium_phy_writel(phytium_dp, PE220X_PHY_PMA0_POWER(port), data);
gpu/drm/phytium/pe220x_dp.c:110: for (i = 0; i < phytium_dp->source_max_lane_count; i++) {
gpu/drm/phytium/pe220x_dp.c:115: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL_EN(port), data);
gpu/drm/phytium/pe220x_dp.c:119: phytium_phy_writel(phytium_dp, PE220X_PHY_PMA_CONTROL(port), data);
gpu/drm/phytium/pe220x_dp.c:123: phytium_phy_readl(phytium_dp, PE220X_PHY_PMA_CONTROL2(port));
gpu/drm/phytium/pe220x_dp.c:148: DRM_ERROR("phytium dp rate(%d) not support\n", link_rate);
gpu/drm/phytium/pe220x_dp.c:156: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_CLK_SEL(port), tmp);
gpu/drm/phytium/pe220x_dp.c:157: phytium_phy_writel(phytium_dp, PE220X_PHY_HSCLK0_SEL(port), HSCLK_LINK_0);
gpu/drm/phytium/pe220x_dp.c:158: phytium_phy_writel(phytium_dp, PE220X_PHY_HSCLK0_DIV(port), tmp1);
gpu/drm/phytium/pe220x_dp.c:161: phytium_phy_writel(phytium_dp, PE220X_PHY_PLLDRC0_CTRL(port), PLLDRC_LINK0);
gpu/drm/phytium/pe220x_dp.c:164: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_DSM_M0(port), PLL0_DSM_M0);
gpu/drm/phytium/pe220x_dp.c:165: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_VCOCAL_START(port),
gpu/drm/phytium/pe220x_dp.c:167: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_VCOCAL_CTRL(port),
gpu/drm/phytium/pe220x_dp.c:171: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_CP_PADJ(port),
gpu/drm/phytium/pe220x_dp.c:173: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_CP_IADJ(port),
gpu/drm/phytium/pe220x_dp.c:175: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_CP_FILT_PADJ(port),
gpu/drm/phytium/pe220x_dp.c:177: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_INTDIV(port),
gpu/drm/phytium/pe220x_dp.c:179: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_FRACDIVL(port),
gpu/drm/phytium/pe220x_dp.c:181: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_FRACDIVH(port),
gpu/drm/phytium/pe220x_dp.c:183: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_HIGH_THR(port),
gpu/drm/phytium/pe220x_dp.c:185: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_PDIAG_CTRL(port),
gpu/drm/phytium/pe220x_dp.c:187: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_VCOCAL_PLLCNT_START(port),
gpu/drm/phytium/pe220x_dp.c:189: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_LOCK_PEFCNT(port),
gpu/drm/phytium/pe220x_dp.c:191: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_LOCK_PLLCNT_START(port),
gpu/drm/phytium/pe220x_dp.c:193: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_LOCK_PLLCNT_THR(port),
gpu/drm/phytium/pe220x_dp.c:196: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_PSC_A0(port),
gpu/drm/phytium/pe220x_dp.c:198: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_PSC_A2(port),
gpu/drm/phytium/pe220x_dp.c:200: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_PSC_A3(port),
gpu/drm/phytium/pe220x_dp.c:202: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_RX_PSC_A0(port),
gpu/drm/phytium/pe220x_dp.c:204: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_RX_PSC_A2(port),
gpu/drm/phytium/pe220x_dp.c:206: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_RX_PSC_A3(port),
gpu/drm/phytium/pe220x_dp.c:208: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_RX_PSC_CAL(port),
gpu/drm/phytium/pe220x_dp.c:211: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_XCVR_CTRL(port),
gpu/drm/phytium/pe220x_dp.c:213: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_RX_GCSM1_CTRL(port),
gpu/drm/phytium/pe220x_dp.c:215: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_RX_GCSM2_CTRL(port),
gpu/drm/phytium/pe220x_dp.c:217: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_RX_PERGCSM_CTRL(port),
gpu/drm/phytium/pe220x_dp.c:222: phytium_phy_writel(phytium_dp, PE220X_PHY_PMA_CONTROL(port), data);
gpu/drm/phytium/pe220x_dp.c:226: for (i = 0; i < phytium_dp->source_max_lane_count; i++)
gpu/drm/phytium/pe220x_dp.c:228: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL_EN(port), data);
gpu/drm/phytium/pe220x_dp.c:232: for (i = 0; i < phytium_dp->source_max_lane_count; i++)
gpu/drm/phytium/pe220x_dp.c:234: phytium_phy_writel(phytium_dp, PE220X_PHY_PMA0_POWER(port), data);
gpu/drm/phytium/pe220x_dp.c:240: tmp = phytium_phy_readl(phytium_dp, PE220X_PHY_PMA_CONTROL2(port));
gpu/drm/phytium/pe220x_dp.c:252:static void pe220x_dp_hw_set_phy_lane_setting(struct phytium_dp_device *phytium_dp,
gpu/drm/phytium/pe220x_dp.c:255: int port = phytium_dp->port % 3;
gpu/drm/phytium/pe220x_dp.c:303: DRM_ERROR("phytium dp rate(%d) not support\n", link_rate);
gpu/drm/phytium/pe220x_dp.c:308: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_DIAG_ACYA(port), LOCK);
gpu/drm/phytium/pe220x_dp.c:309: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_TXCC_CTRL(port), TX_TXCC_CTRL);
gpu/drm/phytium/pe220x_dp.c:310: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_DRV(port), TX_DRV);
gpu/drm/phytium/pe220x_dp.c:311: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_MGNFS(port),
gpu/drm/phytium/pe220x_dp.c:313: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_CPOST(port),
gpu/drm/phytium/pe220x_dp.c:315: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL0_TX_DIAG_ACYA(port), UNLOCK);
gpu/drm/phytium/pe220x_dp.c:318:static int pe220x_dp_hw_init_phy(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:320: int port = phytium_dp->port;
gpu/drm/phytium/pe220x_dp.c:324: phytium_phy_writel(phytium_dp, PE220X_PHY_APB_RESET(port), APB_RESET);
gpu/drm/phytium/pe220x_dp.c:325: phytium_phy_writel(phytium_dp, PE220X_PHY_PIPE_RESET(port), RESET);
gpu/drm/phytium/pe220x_dp.c:329: for (i = 0; i < phytium_dp->source_max_lane_count; i++)
gpu/drm/phytium/pe220x_dp.c:331: phytium_phy_writel(phytium_dp, PE220X_PHY_MODE(port), data);
gpu/drm/phytium/pe220x_dp.c:335: for (i = 0; i < phytium_dp->source_max_lane_count; i++)
gpu/drm/phytium/pe220x_dp.c:337: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL_EN(port), data);
gpu/drm/phytium/pe220x_dp.c:341: for (i = 0; i < phytium_dp->source_max_lane_count; i++)
gpu/drm/phytium/pe220x_dp.c:343: phytium_phy_writel(phytium_dp, PE220X_PHY_PMA_WIDTH(port), data);
gpu/drm/phytium/pe220x_dp.c:347: for (i = 0; i < phytium_dp->source_max_lane_count; i++)
gpu/drm/phytium/pe220x_dp.c:349: phytium_phy_writel(phytium_dp, PE220X_PHY_PMA0_POWER(port), data);
gpu/drm/phytium/pe220x_dp.c:352: phytium_phy_writel(phytium_dp, PE220X_PHY_LINK_RESET(port), LINK_RESET);
gpu/drm/phytium/pe220x_dp.c:354: phytium_phy_writel(phytium_dp, PE220X_PHY_SGMII_DPSEL_INIT(port), DP_SEL);
gpu/drm/phytium/pe220x_dp.c:357: phytium_phy_writel(phytium_dp, PE220X_PHY_PLL_CFG(port), SINGLE_LINK);
gpu/drm/phytium/pe220x_dp.c:360: phytium_phy_writel(phytium_dp, PE220X_PHY_PIPE_RESET(port), RESET_DEASSERT);
gpu/drm/phytium/pe220x_dp.c:366: tmp = phytium_phy_readl(phytium_dp, PE220X_PHY_PMA_CONTROL2(port));
gpu/drm/phytium/pe220x_dp.c:378:static void pe220x_dp_hw_poweron_panel(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:380: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/pe220x_dp.c:381: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/pe220x_dp.c:382: int port = phytium_dp->port;
gpu/drm/phytium/pe220x_dp.c:385: phytium_writel_reg(priv, FLAG_REQUEST | CMD_BACKLIGHT | PANEL_POWER_ENABLE,
gpu/drm/phytium/pe220x_dp.c:387: ret = phytium_wait_cmd_done(priv, PE220X_DC_CMD_REGISTER(port),
gpu/drm/phytium/pe220x_dp.c:393:static void pe220x_dp_hw_poweroff_panel(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:395: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/pe220x_dp.c:396: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/pe220x_dp.c:397: int port = phytium_dp->port;
gpu/drm/phytium/pe220x_dp.c:400: phytium_writel_reg(priv, FLAG_REQUEST | CMD_BACKLIGHT | PANEL_POWER_DISABLE,
gpu/drm/phytium/pe220x_dp.c:402: ret = phytium_wait_cmd_done(priv, PE220X_DC_CMD_REGISTER(port),
gpu/drm/phytium/pe220x_dp.c:408:static void pe220x_dp_hw_enable_backlight(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:410: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/pe220x_dp.c:411: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/pe220x_dp.c:412: int port = phytium_dp->port, ret = 0;
gpu/drm/phytium/pe220x_dp.c:414: phytium_writel_reg(priv, FLAG_REQUEST | CMD_BACKLIGHT | BACKLIGHT_ENABLE,
gpu/drm/phytium/pe220x_dp.c:416: ret = phytium_wait_cmd_done(priv, PE220X_DC_CMD_REGISTER(port),
gpu/drm/phytium/pe220x_dp.c:422:static void pe220x_dp_hw_disable_backlight(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:424: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/pe220x_dp.c:425: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/pe220x_dp.c:426: int port = phytium_dp->port;
gpu/drm/phytium/pe220x_dp.c:429: phytium_writel_reg(priv, FLAG_REQUEST | CMD_BACKLIGHT | BACKLIGHT_DISABLE,
gpu/drm/phytium/pe220x_dp.c:431: ret = phytium_wait_cmd_done(priv, PE220X_DC_CMD_REGISTER(port),
gpu/drm/phytium/pe220x_dp.c:437:static uint32_t pe220x_dp_hw_get_backlight(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:439: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/pe220x_dp.c:440: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/pe220x_dp.c:444: config = phytium_readl_reg(priv, group_offset, PE220X_DC_ADDRESS_TRANSFORM_BACKLIGHT_VALUE);
gpu/drm/phytium/pe220x_dp.c:448:static int pe220x_dp_hw_set_backlight(struct phytium_dp_device *phytium_dp, uint32_t level)
gpu/drm/phytium/pe220x_dp.c:450: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/pe220x_dp.c:451: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/pe220x_dp.c:452: int port = phytium_dp->port;
gpu/drm/phytium/pe220x_dp.c:462: phytium_writel_reg(priv, config, 0, PE220X_DC_CMD_REGISTER(port));
gpu/drm/phytium/pe220x_dp.c:463: ret = phytium_wait_cmd_done(priv, PE220X_DC_CMD_REGISTER(port),
gpu/drm/phytium/pe220x_dp.c:471:bool pe220x_dp_hw_spread_is_enable(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:476:int pe220x_dp_hw_reset(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:478: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/pe220x_dp.c:479: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/pe220x_dp.c:480: int port = phytium_dp->port;
gpu/drm/phytium/pe220x_dp.c:483: phytium_writel_reg(priv, DP_RESET, group_offset, PE220X_DP_CONTROLLER_RESET);
gpu/drm/phytium/pe220x_dp.c:485: phytium_writel_reg(priv, AUX_CLK_DIVIDER_100, group_offset, PHYTIUM_DP_AUX_CLK_DIVIDER);
gpu/drm/phytium/pe220x_dp.c:486: phytium_writel_reg(priv, SUPPORT_EDP_1_4, group_offset, PHYTIUM_EDP_CRC_ENABLE);
gpu/drm/phytium/pe220x_dp.c:491:uint8_t pe220x_dp_hw_get_source_lane_count(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:493: return pe220x_dp_source_lane_count[phytium_dp->port];
gpu/drm/phytium/pe220x_dp.c:496:static struct phytium_dp_func pe220x_dp_funcs = {
gpu/drm/phytium/pe220x_dp.c:511:void pe220x_dp_func_register(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/pe220x_dp.c:513: phytium_dp->funcs = &pe220x_dp_funcs;
gpu/drm/phytium/phytium_debugfs.c:10:#include "phytium_display_drv.h"
gpu/drm/phytium/phytium_debugfs.c:11:#include "phytium_dp.h"
gpu/drm/phytium/phytium_debugfs.c:12:#include "phytium_reg.h"
gpu/drm/phytium/phytium_debugfs.c:23:phytium_dp_register_write(struct file *filp,
gpu/drm/phytium/phytium_debugfs.c:41:static int phytium_dp_register_show(struct seq_file *m, void *data)
gpu/drm/phytium/phytium_debugfs.c:44: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:45: struct drm_device *dev = phytium_dp->dev;
gpu/drm/phytium/phytium_debugfs.c:46: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_debugfs.c:47: int port = phytium_dp->port;
gpu/drm/phytium/phytium_debugfs.c:51: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_M_VID));
gpu/drm/phytium/phytium_debugfs.c:53: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_N_VID));
gpu/drm/phytium/phytium_debugfs.c:55: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_TRANSFER_UNIT_SIZE));
gpu/drm/phytium/phytium_debugfs.c:57: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_DATA_COUNT));
gpu/drm/phytium/phytium_debugfs.c:59: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_HTOTAL));
gpu/drm/phytium/phytium_debugfs.c:61: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_HRES));
gpu/drm/phytium/phytium_debugfs.c:63: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_HSWIDTH));
gpu/drm/phytium/phytium_debugfs.c:65: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_HSTART));
gpu/drm/phytium/phytium_debugfs.c:67: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_VTOTAL));
gpu/drm/phytium/phytium_debugfs.c:69: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_VRES));
gpu/drm/phytium/phytium_debugfs.c:71: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_VSWIDTH));
gpu/drm/phytium/phytium_debugfs.c:73: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_VSTART));
gpu/drm/phytium/phytium_debugfs.c:75: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_POLARITY));
gpu/drm/phytium/phytium_debugfs.c:77: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_MISC0));
gpu/drm/phytium/phytium_debugfs.c:79: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_MAIN_LINK_MISC1));
gpu/drm/phytium/phytium_debugfs.c:81: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_USER_SYNC_POLARITY));
gpu/drm/phytium/phytium_debugfs.c:83: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_VIDEO_STREAM_ENABLE));
gpu/drm/phytium/phytium_debugfs.c:85: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SECONDARY_STREAM_ENABLE));
gpu/drm/phytium/phytium_debugfs.c:88: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_INPUT_SELECT));
gpu/drm/phytium/phytium_debugfs.c:90: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_DIRECT_CLKDIV));
gpu/drm/phytium/phytium_debugfs.c:92: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_CHANNEL_COUNT));
gpu/drm/phytium/phytium_debugfs.c:94: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_CHANNEL_MAP));
gpu/drm/phytium/phytium_debugfs.c:96: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_DATA_WINDOW));
gpu/drm/phytium/phytium_debugfs.c:98: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_CS_CATEGORY_CODE));
gpu/drm/phytium/phytium_debugfs.c:100: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_MAUD));
gpu/drm/phytium/phytium_debugfs.c:102: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_NAUD));
gpu/drm/phytium/phytium_debugfs.c:104: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_CLOCK_MODE));
gpu/drm/phytium/phytium_debugfs.c:106: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_CS_SOURCE_FORMAT));
gpu/drm/phytium/phytium_debugfs.c:108: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_CS_LENGTH_ORIG_FREQ));
gpu/drm/phytium/phytium_debugfs.c:110: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_CS_FREQ_CLOCK_ACCURACY));
gpu/drm/phytium/phytium_debugfs.c:112: phytium_readl_reg(priv, group_offset, PHYTIUM_DP_SEC_AUDIO_ENABLE));
gpu/drm/phytium/phytium_debugfs.c:117:static int phytium_dp_register_open(struct inode *inode, struct file *file)
gpu/drm/phytium/phytium_debugfs.c:119: return single_open(file, phytium_dp_register_show, inode->i_private);
gpu/drm/phytium/phytium_debugfs.c:122:static const struct file_operations phytium_dp_register_fops = {
gpu/drm/phytium/phytium_debugfs.c:124: .open = phytium_dp_register_open,
gpu/drm/phytium/phytium_debugfs.c:128: .write = phytium_dp_register_write,
gpu/drm/phytium/phytium_debugfs.c:132:phytium_dp_trigger_train_fail_write(struct file *filp,
gpu/drm/phytium/phytium_debugfs.c:139: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:150: if (kstrtouint(tmp, 10, &phytium_dp->trigger_train_fail) != 0)
gpu/drm/phytium/phytium_debugfs.c:156:static int phytium_dp_trigger_train_fail_show(struct seq_file *m, void *data)
gpu/drm/phytium/phytium_debugfs.c:159: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:161: seq_printf(m, "trigger_train_fail: %d\n", phytium_dp->trigger_train_fail);
gpu/drm/phytium/phytium_debugfs.c:162: seq_printf(m, "train_retry_count: %d\n", phytium_dp->train_retry_count);
gpu/drm/phytium/phytium_debugfs.c:167:static int phytium_dp_trigger_train_fail_open(struct inode *inode, struct file *file)
gpu/drm/phytium/phytium_debugfs.c:169: return single_open(file, phytium_dp_trigger_train_fail_show, inode->i_private);
gpu/drm/phytium/phytium_debugfs.c:172:static const struct file_operations phytium_dp_trigger_train_fail_fops = {
gpu/drm/phytium/phytium_debugfs.c:174: .open = phytium_dp_trigger_train_fail_open,
gpu/drm/phytium/phytium_debugfs.c:178: .write = phytium_dp_trigger_train_fail_write,
gpu/drm/phytium/phytium_debugfs.c:181:static int phytium_edp_backlight_show(struct seq_file *m, void *data)
gpu/drm/phytium/phytium_debugfs.c:184: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:186: if (!phytium_dp->is_edp)
gpu/drm/phytium/phytium_debugfs.c:189: mutex_lock(&phytium_dp->panel.panel_lock);
gpu/drm/phytium/phytium_debugfs.c:190: seq_printf(m, "backlight: %s\n", phytium_dp->panel.backlight_enabled?"enabled":"disabled");
gpu/drm/phytium/phytium_debugfs.c:191: mutex_unlock(&phytium_dp->panel.panel_lock);
gpu/drm/phytium/phytium_debugfs.c:196:static int phytium_edp_backlight_open(struct inode *inode, struct file *file)
gpu/drm/phytium/phytium_debugfs.c:198: return single_open(file, phytium_edp_backlight_show, inode->i_private);
gpu/drm/phytium/phytium_debugfs.c:201:static const struct file_operations phytium_edp_backlight_fops = {
gpu/drm/phytium/phytium_debugfs.c:203: .open = phytium_edp_backlight_open,
gpu/drm/phytium/phytium_debugfs.c:209:static int phytium_edp_power_show(struct seq_file *m, void *data)
gpu/drm/phytium/phytium_debugfs.c:212: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:214: if (!phytium_dp->is_edp)
gpu/drm/phytium/phytium_debugfs.c:217: mutex_lock(&phytium_dp->panel.panel_lock);
gpu/drm/phytium/phytium_debugfs.c:218: seq_printf(m, "power: %s\n", phytium_dp->panel.power_enabled?"enabled":"disabled");
gpu/drm/phytium/phytium_debugfs.c:219: mutex_unlock(&phytium_dp->panel.panel_lock);
gpu/drm/phytium/phytium_debugfs.c:224:static int phytium_edp_power_open(struct inode *inode, struct file *file)
gpu/drm/phytium/phytium_debugfs.c:226: return single_open(file, phytium_edp_power_show, inode->i_private);
gpu/drm/phytium/phytium_debugfs.c:229:static const struct file_operations phytium_edp_power_fops = {
gpu/drm/phytium/phytium_debugfs.c:231: .open = phytium_edp_power_open,
gpu/drm/phytium/phytium_debugfs.c:248:static const struct dpcd_block phytium_dpcd_debug[] = {
gpu/drm/phytium/phytium_debugfs.c:263:static int phytium_dpcd_show(struct seq_file *m, void *data)
gpu/drm/phytium/phytium_debugfs.c:266: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:273: for (i = 0; i < ARRAY_SIZE(phytium_dpcd_debug); i++) {
gpu/drm/phytium/phytium_debugfs.c:274: const struct dpcd_block *b = &phytium_dpcd_debug[i];
gpu/drm/phytium/phytium_debugfs.c:280: err = drm_dp_dpcd_read(&phytium_dp->aux, b->offset, buf, size);
gpu/drm/phytium/phytium_debugfs.c:293:static int phytium_dpcd_open(struct inode *inode, struct file *file)
gpu/drm/phytium/phytium_debugfs.c:295: return single_open(file, phytium_dpcd_show, inode->i_private);
gpu/drm/phytium/phytium_debugfs.c:298:static const struct file_operations phytium_dpcd_fops = {
gpu/drm/phytium/phytium_debugfs.c:300: .open = phytium_dpcd_open,
gpu/drm/phytium/phytium_debugfs.c:307:phytium_dp_state_write(struct file *filp,
gpu/drm/phytium/phytium_debugfs.c:325:static int phytium_dp_state_show(struct seq_file *m, void *data)
gpu/drm/phytium/phytium_debugfs.c:328: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:330: seq_printf(m, "port number: %d\n", phytium_dp->port);
gpu/drm/phytium/phytium_debugfs.c:331: seq_printf(m, "source_max_lane_count: %d\n", phytium_dp->source_max_lane_count);
gpu/drm/phytium/phytium_debugfs.c:333: phytium_dp->source_rates[phytium_dp->num_source_rates-1]);
gpu/drm/phytium/phytium_debugfs.c:335: seq_printf(m, "sink_max_lane_count: %d\n", phytium_dp->sink_max_lane_count);
gpu/drm/phytium/phytium_debugfs.c:337: phytium_dp->sink_rates[phytium_dp->num_sink_rates-1]);
gpu/drm/phytium/phytium_debugfs.c:338: seq_printf(m, "link_rate: %d\n", phytium_dp->link_rate);
gpu/drm/phytium/phytium_debugfs.c:339: seq_printf(m, "link_lane_count: %d\n", phytium_dp->link_lane_count);
gpu/drm/phytium/phytium_debugfs.c:340: seq_printf(m, "train_set[0]: %d\n", phytium_dp->train_set[0]);
gpu/drm/phytium/phytium_debugfs.c:341: seq_printf(m, "has_audio: %s\n", phytium_dp->has_audio?"yes":"no");
gpu/drm/phytium/phytium_debugfs.c:347:static int phytium_dp_state_open(struct inode *inode, struct file *file)
gpu/drm/phytium/phytium_debugfs.c:349: return single_open(file, phytium_dp_state_show, inode->i_private);
gpu/drm/phytium/phytium_debugfs.c:352:static const struct file_operations phytium_dp_state_fops = {
gpu/drm/phytium/phytium_debugfs.c:354: .open = phytium_dp_state_open,
gpu/drm/phytium/phytium_debugfs.c:358: .write = phytium_dp_state_write,
gpu/drm/phytium/phytium_debugfs.c:361:static const struct phytium_debugfs_files {
gpu/drm/phytium/phytium_debugfs.c:364:} phytium_debugfs_connector_files[] = {
gpu/drm/phytium/phytium_debugfs.c:365: {"dp_state", &phytium_dp_state_fops},
gpu/drm/phytium/phytium_debugfs.c:366: {"dpcd", &phytium_dpcd_fops},
gpu/drm/phytium/phytium_debugfs.c:367: {"dp_register", &phytium_dp_register_fops},
gpu/drm/phytium/phytium_debugfs.c:368: {"dp_trigger_train_fail", &phytium_dp_trigger_train_fail_fops},
gpu/drm/phytium/phytium_debugfs.c:371:static const struct phytium_debugfs_files phytium_edp_debugfs_connector_files[] = {
gpu/drm/phytium/phytium_debugfs.c:372: {"edp_power", &phytium_edp_power_fops},
gpu/drm/phytium/phytium_debugfs.c:373: {"edp_backlight", &phytium_edp_backlight_fops},
gpu/drm/phytium/phytium_debugfs.c:376:int phytium_debugfs_connector_add(struct drm_connector *connector)
gpu/drm/phytium/phytium_debugfs.c:381: struct phytium_dp_device *phytium_dp = connector_to_dp_device(connector);
gpu/drm/phytium/phytium_debugfs.c:386: for (i = 0; i < ARRAY_SIZE(phytium_debugfs_connector_files); i++) {
gpu/drm/phytium/phytium_debugfs.c:387: ent = debugfs_create_file(phytium_debugfs_connector_files[i].name,
gpu/drm/phytium/phytium_debugfs.c:391: phytium_debugfs_connector_files[i].fops);
gpu/drm/phytium/phytium_debugfs.c:396: if (phytium_dp->is_edp)
gpu/drm/phytium/phytium_debugfs.c:397: for (i = 0; i < ARRAY_SIZE(phytium_edp_debugfs_connector_files); i++) {
gpu/drm/phytium/phytium_debugfs.c:398: ent = debugfs_create_file(phytium_edp_debugfs_connector_files[i].name,
gpu/drm/phytium/phytium_debugfs.c:402: phytium_edp_debugfs_connector_files[i].fops);
gpu/drm/phytium/phytium_debugfs.c:410:static int phytium_mem_state_show(struct seq_file *m, void *data)
gpu/drm/phytium/phytium_debugfs.c:412: struct phytium_display_private *priv = m->private;
gpu/drm/phytium/phytium_debugfs.c:421:static int phytium_mem_state_open(struct inode *inode, struct file *file)
gpu/drm/phytium/phytium_debugfs.c:423: return single_open(file, phytium_mem_state_show, inode->i_private);
gpu/drm/phytium/phytium_debugfs.c:426:static const struct file_operations phytium_mem_state_fops = {
gpu/drm/phytium/phytium_debugfs.c:428: .open = phytium_mem_state_open,
gpu/drm/phytium/phytium_debugfs.c:434:static const struct phytium_debugfs_files phytium_debugfs_display_files[] = {
gpu/drm/phytium/phytium_debugfs.c:435: {"mem_state", &phytium_mem_state_fops},
gpu/drm/phytium/phytium_debugfs.c:438:int phytium_debugfs_display_register(struct phytium_display_private *priv)
gpu/drm/phytium/phytium_debugfs.c:447: ent = debugfs_create_file(phytium_debugfs_display_files[0].name,
gpu/drm/phytium/phytium_debugfs.c:451: phytium_debugfs_display_files[0].fops);
gpu/drm/phytium/phytium_plane.c:16:#include "phytium_display_drv.h"
gpu/drm/phytium/phytium_plane.c:17:#include "phytium_plane.h"
gpu/drm/phytium/phytium_plane.c:18:#include "phytium_fb.h"
gpu/drm/phytium/phytium_plane.c:19:#include "phytium_gem.h"
gpu/drm/phytium/phytium_plane.c:20:#include "phytium_crtc.h"
gpu/drm/phytium/phytium_plane.c:23:#include "phytium_reg.h"
gpu/drm/phytium/phytium_plane.c:28:void phytium_plane_destroy(struct drm_plane *plane)
gpu/drm/phytium/phytium_plane.c:30: struct phytium_plane *phytium_plane = to_phytium_plane(plane);
gpu/drm/phytium/phytium_plane.c:33: kfree(phytium_plane);
gpu/drm/phytium/phytium_plane.c:37: * phytium_plane_atomic_get_property - fetch plane property value
gpu/drm/phytium/phytium_plane.c:48:phytium_plane_atomic_get_property(struct drm_plane *plane,
gpu/drm/phytium/phytium_plane.c:58: * phytium_plane_atomic_set_property - set plane property value
gpu/drm/phytium/phytium_plane.c:70:phytium_plane_atomic_set_property(struct drm_plane *plane,
gpu/drm/phytium/phytium_plane.c:80:phytium_plane_atomic_duplicate_state(struct drm_plane *plane)
gpu/drm/phytium/phytium_plane.c:83: struct phytium_plane_state *phytium_state = NULL;
gpu/drm/phytium/phytium_plane.c:85: phytium_state = kmemdup(plane->state, sizeof(*phytium_state), GFP_KERNEL);
gpu/drm/phytium/phytium_plane.c:87: if (!phytium_state)
gpu/drm/phytium/phytium_plane.c:90: state = &phytium_state->base;
gpu/drm/phytium/phytium_plane.c:101:phytium_plane_atomic_destroy_state(struct drm_plane *plane, struct drm_plane_state *state)
gpu/drm/phytium/phytium_plane.c:103: struct phytium_plane_state *phytium_state = to_phytium_plane_state(state);
gpu/drm/phytium/phytium_plane.c:106: kfree(phytium_state);
gpu/drm/phytium/phytium_plane.c:109:static bool phytium_plane_format_mod_supported(struct drm_plane *plane,
gpu/drm/phytium/phytium_plane.c:138:const struct drm_plane_funcs phytium_plane_funcs = {
gpu/drm/phytium/phytium_plane.c:141: .destroy = phytium_plane_destroy,
gpu/drm/phytium/phytium_plane.c:143: .atomic_get_property = phytium_plane_atomic_get_property,
gpu/drm/phytium/phytium_plane.c:144: .atomic_set_property = phytium_plane_atomic_set_property,
gpu/drm/phytium/phytium_plane.c:145: .atomic_duplicate_state = phytium_plane_atomic_duplicate_state,
gpu/drm/phytium/phytium_plane.c:146: .atomic_destroy_state = phytium_plane_atomic_destroy_state,
gpu/drm/phytium/phytium_plane.c:147: .format_mod_supported = phytium_plane_format_mod_supported,
gpu/drm/phytium/phytium_plane.c:150:static int phytium_plane_prepare_fb(struct drm_plane *plane,
gpu/drm/phytium/phytium_plane.c:158: dma_buf = to_phytium_framebuffer(state->fb)->phytium_gem_obj[0]->base.dma_buf;
gpu/drm/phytium/phytium_plane.c:168:phytium_plane_atomic_check(struct drm_plane *plane, struct drm_plane_state *state)
gpu/drm/phytium/phytium_plane.c:171: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_plane.c:177: struct phytium_crtc *phytium_crtc = to_phytium_crtc(crtc);
gpu/drm/phytium/phytium_plane.c:189: if (phytium_crtc->scale_enable)
gpu/drm/phytium/phytium_plane.c:230:static void phytium_dc_get_plane_parameter(struct drm_plane *plane)
gpu/drm/phytium/phytium_plane.c:232: struct phytium_plane *phytium_plane = to_phytium_plane(plane);
gpu/drm/phytium/phytium_plane.c:234: struct phytium_framebuffer *phytium_fb = to_phytium_framebuffer(fb);
gpu/drm/phytium/phytium_plane.c:235: struct phytium_gem_object *phytium_gem_obj = NULL;
gpu/drm/phytium/phytium_plane.c:243: phytium_gem_obj = phytium_fb->phytium_gem_obj[i];
gpu/drm/phytium/phytium_plane.c:244: phytium_plane->iova[i] = phytium_gem_obj->iova + fb->offsets[i];
gpu/drm/phytium/phytium_plane.c:245: phytium_plane->size[i] = phytium_gem_obj->size - fb->offsets[i];
gpu/drm/phytium/phytium_plane.c:248: phytium_plane->tiling[i] = FRAMEBUFFER_TILE_MODE0;
gpu/drm/phytium/phytium_plane.c:250: phytium_plane->tiling[i] = FRAMEBUFFER_TILE_MODE3;
gpu/drm/phytium/phytium_plane.c:252: phytium_plane->tiling[i] = FRAMEBUFFER_LINEAR;
gpu/drm/phytium/phytium_plane.c:254: phytium_plane->tiling[i] = FRAMEBUFFER_LINEAR;
gpu/drm/phytium/phytium_plane.c:262: phytium_plane->format = FRAMEBUFFER_FORMAT_ARGB2101010;
gpu/drm/phytium/phytium_plane.c:269: phytium_plane->format = FRAMEBUFFER_FORMAT_ARGB8888;
gpu/drm/phytium/phytium_plane.c:276: phytium_plane->format = FRAMEBUFFER_FORMAT_XRGB8888;
gpu/drm/phytium/phytium_plane.c:283: phytium_plane->format = FRAMEBUFFER_FORMAT_ARGB4444;
gpu/drm/phytium/phytium_plane.c:290: phytium_plane->format = FRAMEBUFFER_FORMAT_XRGB4444;
gpu/drm/phytium/phytium_plane.c:297: phytium_plane->format = FRAMEBUFFER_FORMAT_ARGB1555;
gpu/drm/phytium/phytium_plane.c:304: phytium_plane->format = FRAMEBUFFER_FORMAT_XRGB1555;
gpu/drm/phytium/phytium_plane.c:309: phytium_plane->format = FRAMEBUFFER_FORMAT_RGB565;
gpu/drm/phytium/phytium_plane.c:313: phytium_plane->format = FRAMEBUFFER_FORMAT_YUYV;
gpu/drm/phytium/phytium_plane.c:317: phytium_plane->format = FRAMEBUFFER_FORMAT_UYVY;
gpu/drm/phytium/phytium_plane.c:320: phytium_plane->format = FRAMEBUFFER_FORMAT_NV16;
gpu/drm/phytium/phytium_plane.c:323: phytium_plane->format = FRAMEBUFFER_FORMAT_NV12;
gpu/drm/phytium/phytium_plane.c:326: phytium_plane->format = FRAMEBUFFER_FORMAT_NV12;
gpu/drm/phytium/phytium_plane.c:343: phytium_plane->swizzle = FRAMEBUFFER_SWIZZLE_ARGB;
gpu/drm/phytium/phytium_plane.c:344: phytium_plane->uv_swizzle = FRAMEBUFFER_UVSWIZZLE_DISABLE;
gpu/drm/phytium/phytium_plane.c:355: phytium_plane->swizzle = FRAMEBUFFER_SWIZZLE_ABGR;
gpu/drm/phytium/phytium_plane.c:356: phytium_plane->uv_swizzle = FRAMEBUFFER_UVSWIZZLE_DISABLE;
gpu/drm/phytium/phytium_plane.c:366: phytium_plane->swizzle = FRAMEBUFFER_SWIZZLE_RGBA;
gpu/drm/phytium/phytium_plane.c:367: phytium_plane->uv_swizzle = FRAMEBUFFER_UVSWIZZLE_DISABLE;
gpu/drm/phytium/phytium_plane.c:377: phytium_plane->swizzle = FRAMEBUFFER_SWIZZLE_BGRA;
gpu/drm/phytium/phytium_plane.c:378: phytium_plane->uv_swizzle = FRAMEBUFFER_UVSWIZZLE_DISABLE;
gpu/drm/phytium/phytium_plane.c:385: phytium_plane->swizzle = FRAMEBUFFER_SWIZZLE_ARGB;
gpu/drm/phytium/phytium_plane.c:386: phytium_plane->uv_swizzle = FRAMEBUFFER_UVSWIZZLE_DISABLE;
gpu/drm/phytium/phytium_plane.c:398:static void phytium_dc_primary_plane_update(struct drm_plane *plane)
gpu/drm/phytium/phytium_plane.c:401: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_plane.c:402: struct phytium_plane *phytium_plane = to_phytium_plane(plane);
gpu/drm/phytium/phytium_plane.c:404: int phys_pipe = phytium_plane->phys_pipe;
gpu/drm/phytium/phytium_plane.c:416: if (phytium_plane->dc_hw_update_dcreq)
gpu/drm/phytium/phytium_plane.c:417: phytium_plane->dc_hw_update_dcreq(plane);
gpu/drm/phytium/phytium_plane.c:418: phytium_plane->dc_hw_update_primary_hi_addr(plane);
gpu/drm/phytium/phytium_plane.c:423: phytium_writel_reg(priv, (phytium_plane->iova[0] + base_offset) & ADDRESS_MASK,
gpu/drm/phytium/phytium_plane.c:425: phytium_writel_reg(priv, ALIGN(fb->pitches[0], 128),
gpu/drm/phytium/phytium_plane.c:429: phytium_writel_reg(priv, phytium_plane->iova[1] & 0xffffffff,
gpu/drm/phytium/phytium_plane.c:431: phytium_writel_reg(priv, ALIGN(fb->pitches[1], 128),
gpu/drm/phytium/phytium_plane.c:435: phytium_writel_reg(priv, phytium_plane->iova[2] & 0xffffffff,
gpu/drm/phytium/phytium_plane.c:437: phytium_writel_reg(priv, ALIGN(fb->pitches[2], 128),
gpu/drm/phytium/phytium_plane.c:441: phytium_writel_reg(priv, (crtc_w & WIDTH_MASK) | ((crtc_h&HEIGHT_MASK) << HEIGHT_SHIFT),
gpu/drm/phytium/phytium_plane.c:444: config = phytium_readl_reg(priv, priv->dc_reg_base[phys_pipe],
gpu/drm/phytium/phytium_plane.c:447: config |= (phytium_plane->format << FRAMEBUFFER_FORMAT_SHIFT);
gpu/drm/phytium/phytium_plane.c:449: config |= (phytium_plane->uv_swizzle << FRAMEBUFFER_UVSWIZZLE_SHIFT);
gpu/drm/phytium/phytium_plane.c:451: config |= (phytium_plane->swizzle << FRAMEBUFFER_SWIZZLE_SHIFT);
gpu/drm/phytium/phytium_plane.c:453: config |= (phytium_plane->tiling[0] << FRAMEBUFFER_TILE_MODE_SHIFT);
gpu/drm/phytium/phytium_plane.c:455: phytium_writel_reg(priv, config, priv->dc_reg_base[phys_pipe],
gpu/drm/phytium/phytium_plane.c:459:static void phytium_dc_cursor_plane_update(struct drm_plane *plane)
gpu/drm/phytium/phytium_plane.c:462: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_plane.c:463: struct phytium_plane *phytium_plane = to_phytium_plane(plane);
gpu/drm/phytium/phytium_plane.c:465: int phys_pipe = phytium_plane->phys_pipe;
gpu/drm/phytium/phytium_plane.c:469: phytium_plane->enable = 1;
gpu/drm/phytium/phytium_plane.c:470: phytium_plane->cursor_hot_x = fb->hot_x;
gpu/drm/phytium/phytium_plane.c:471: phytium_plane->cursor_hot_y = fb->hot_y;
gpu/drm/phytium/phytium_plane.c:472: phytium_plane->cursor_x = plane->state->crtc_x + fb->hot_x;
gpu/drm/phytium/phytium_plane.c:473: phytium_plane->cursor_y = plane->state->crtc_y + fb->hot_y;
gpu/drm/phytium/phytium_plane.c:475: if (phytium_plane->cursor_x < 0) {
gpu/drm/phytium/phytium_plane.c:476: phytium_plane->cursor_hot_x = plane->state->crtc_w - 1;
gpu/drm/phytium/phytium_plane.c:477: phytium_plane->cursor_x = plane->state->crtc_x + phytium_plane->cursor_hot_x;
gpu/drm/phytium/phytium_plane.c:480: if (phytium_plane->cursor_y < 0) {
gpu/drm/phytium/phytium_plane.c:481: phytium_plane->cursor_hot_y = plane->state->crtc_h - 1;
gpu/drm/phytium/phytium_plane.c:482: phytium_plane->cursor_y = plane->state->crtc_y + phytium_plane->cursor_hot_y;
gpu/drm/phytium/phytium_plane.c:486: ((phytium_plane->cursor_hot_y & CURSOR_HOT_Y_MASK) << CURSOR_HOT_Y_SHIFT) |
gpu/drm/phytium/phytium_plane.c:487: ((phytium_plane->cursor_hot_x & CURSOR_HOT_X_MASK) << CURSOR_HOT_X_SHIFT);
gpu/drm/phytium/phytium_plane.c:488: phytium_writel_reg(priv, config, priv->dc_reg_base[phys_pipe], PHYTIUM_DC_CURSOR_CONFIG);
gpu/drm/phytium/phytium_plane.c:490: config = ((phytium_plane->cursor_x & CURSOR_X_MASK) << CURSOR_X_SHIFT) |
gpu/drm/phytium/phytium_plane.c:491: ((phytium_plane->cursor_y & CURSOR_Y_MASK) << CURSOR_Y_SHIFT);
gpu/drm/phytium/phytium_plane.c:492: phytium_writel_reg(priv, config, priv->dc_reg_base[phys_pipe],
gpu/drm/phytium/phytium_plane.c:494: iova = phytium_plane->iova[0];
gpu/drm/phytium/phytium_plane.c:495: phytium_writel_reg(priv, iova & 0xffffffff, priv->dc_reg_base[phys_pipe],
gpu/drm/phytium/phytium_plane.c:497: if (phytium_plane->dc_hw_update_cursor_hi_addr)
gpu/drm/phytium/phytium_plane.c:498: phytium_plane->dc_hw_update_cursor_hi_addr(plane, iova);
gpu/drm/phytium/phytium_plane.c:501:static void phytium_plane_atomic_update(struct drm_plane *plane,
gpu/drm/phytium/phytium_plane.c:518: phytium_dc_get_plane_parameter(plane);
gpu/drm/phytium/phytium_plane.c:521: phytium_dc_primary_plane_update(plane);
gpu/drm/phytium/phytium_plane.c:523: phytium_dc_cursor_plane_update(plane);
gpu/drm/phytium/phytium_plane.c:526:static void phytium_plane_atomic_disable(struct drm_plane *plane,
gpu/drm/phytium/phytium_plane.c:530: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_plane.c:531: struct phytium_plane *phytium_plane = to_phytium_plane(plane);
gpu/drm/phytium/phytium_plane.c:532: int phys_pipe = phytium_plane->phys_pipe;
gpu/drm/phytium/phytium_plane.c:541: phytium_writel_reg(priv, CLEAR_VALUE_RED, priv->dc_reg_base[phys_pipe],
gpu/drm/phytium/phytium_plane.c:543: config = phytium_readl_reg(priv, priv->dc_reg_base[phys_pipe],
gpu/drm/phytium/phytium_plane.c:546: phytium_writel_reg(priv, config, priv->dc_reg_base[phys_pipe],
gpu/drm/phytium/phytium_plane.c:549: phytium_writel_reg(priv, CURSOR_FORMAT_DISABLED,
gpu/drm/phytium/phytium_plane.c:554:const struct drm_plane_helper_funcs phytium_plane_helper_funcs = {
gpu/drm/phytium/phytium_plane.c:555: .prepare_fb = phytium_plane_prepare_fb,
gpu/drm/phytium/phytium_plane.c:556: .atomic_check = phytium_plane_atomic_check,
gpu/drm/phytium/phytium_plane.c:557: .atomic_update = phytium_plane_atomic_update,
gpu/drm/phytium/phytium_plane.c:558: .atomic_disable = phytium_plane_atomic_disable,
gpu/drm/phytium/phytium_plane.c:561:struct phytium_plane *phytium_primary_plane_create(struct drm_device *dev, int phys_pipe)
gpu/drm/phytium/phytium_plane.c:563: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_plane.c:564: struct phytium_plane *phytium_plane = NULL;
gpu/drm/phytium/phytium_plane.c:565: struct phytium_plane_state *phytium_plane_state = NULL;
gpu/drm/phytium/phytium_plane.c:572: phytium_plane = kzalloc(sizeof(*phytium_plane), GFP_KERNEL);
gpu/drm/phytium/phytium_plane.c:573: if (!phytium_plane) {
gpu/drm/phytium/phytium_plane.c:578: phytium_plane_state = kzalloc(sizeof(*phytium_plane_state), GFP_KERNEL);
gpu/drm/phytium/phytium_plane.c:579: if (!phytium_plane_state) {
gpu/drm/phytium/phytium_plane.c:583: phytium_plane_state->base.plane = &phytium_plane->base;
gpu/drm/phytium/phytium_plane.c:584: phytium_plane_state->base.rotation = DRM_MODE_ROTATE_0;
gpu/drm/phytium/phytium_plane.c:585: phytium_plane->base.state = &phytium_plane_state->base;
gpu/drm/phytium/phytium_plane.c:586: phytium_plane->phys_pipe = phys_pipe;
gpu/drm/phytium/phytium_plane.c:589: phytium_plane->dc_hw_plane_get_format = px210_dc_hw_plane_get_primary_format;
gpu/drm/phytium/phytium_plane.c:590: phytium_plane->dc_hw_update_dcreq = px210_dc_hw_update_dcreq;
gpu/drm/phytium/phytium_plane.c:591: phytium_plane->dc_hw_update_primary_hi_addr = px210_dc_hw_update_primary_hi_addr;
gpu/drm/phytium/phytium_plane.c:592: phytium_plane->dc_hw_update_cursor_hi_addr = NULL;
gpu/drm/phytium/phytium_plane.c:594: phytium_plane->dc_hw_plane_get_format = pe220x_dc_hw_plane_get_primary_format;
gpu/drm/phytium/phytium_plane.c:595: phytium_plane->dc_hw_update_dcreq = NULL;
gpu/drm/phytium/phytium_plane.c:596: phytium_plane->dc_hw_update_primary_hi_addr = pe220x_dc_hw_update_primary_hi_addr;
gpu/drm/phytium/phytium_plane.c:597: phytium_plane->dc_hw_update_cursor_hi_addr = NULL;
gpu/drm/phytium/phytium_plane.c:600: phytium_plane->dc_hw_plane_get_format(&format_modifiers, &formats, &format_count);
gpu/drm/phytium/phytium_plane.c:601: ret = drm_universal_plane_init(dev, &phytium_plane->base, 0x0,
gpu/drm/phytium/phytium_plane.c:602: &phytium_plane_funcs, formats,
gpu/drm/phytium/phytium_plane.c:611: drm_plane_create_rotation_property(&phytium_plane->base, DRM_MODE_ROTATE_0, flags);
gpu/drm/phytium/phytium_plane.c:612: drm_plane_helper_add(&phytium_plane->base, &phytium_plane_helper_funcs);
gpu/drm/phytium/phytium_plane.c:614: return phytium_plane;
gpu/drm/phytium/phytium_plane.c:616: kfree(phytium_plane_state);
gpu/drm/phytium/phytium_plane.c:618: kfree(phytium_plane);
gpu/drm/phytium/phytium_plane.c:623:struct phytium_plane *phytium_cursor_plane_create(struct drm_device *dev, int phys_pipe)
gpu/drm/phytium/phytium_plane.c:625: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_plane.c:626: struct phytium_plane *phytium_plane = NULL;
gpu/drm/phytium/phytium_plane.c:627: struct phytium_plane_state *phytium_plane_state = NULL;
gpu/drm/phytium/phytium_plane.c:634: phytium_plane = kzalloc(sizeof(*phytium_plane), GFP_KERNEL);
gpu/drm/phytium/phytium_plane.c:635: if (!phytium_plane) {
gpu/drm/phytium/phytium_plane.c:640: phytium_plane_state = kzalloc(sizeof(*phytium_plane_state), GFP_KERNEL);
gpu/drm/phytium/phytium_plane.c:641: if (!phytium_plane_state) {
gpu/drm/phytium/phytium_plane.c:645: phytium_plane_state->base.plane = &phytium_plane->base;
gpu/drm/phytium/phytium_plane.c:646: phytium_plane_state->base.rotation = DRM_MODE_ROTATE_0;
gpu/drm/phytium/phytium_plane.c:647: phytium_plane->base.state = &phytium_plane_state->base;
gpu/drm/phytium/phytium_plane.c:648: phytium_plane->phys_pipe = phys_pipe;
gpu/drm/phytium/phytium_plane.c:651: phytium_plane->dc_hw_plane_get_format = px210_dc_hw_plane_get_cursor_format;
gpu/drm/phytium/phytium_plane.c:652: phytium_plane->dc_hw_update_dcreq = NULL;
gpu/drm/phytium/phytium_plane.c:653: phytium_plane->dc_hw_update_primary_hi_addr = NULL;
gpu/drm/phytium/phytium_plane.c:654: phytium_plane->dc_hw_update_cursor_hi_addr = NULL;
gpu/drm/phytium/phytium_plane.c:656: phytium_plane->dc_hw_plane_get_format = pe220x_dc_hw_plane_get_cursor_format;
gpu/drm/phytium/phytium_plane.c:657: phytium_plane->dc_hw_update_dcreq = NULL;
gpu/drm/phytium/phytium_plane.c:658: phytium_plane->dc_hw_update_primary_hi_addr = NULL;
gpu/drm/phytium/phytium_plane.c:659: phytium_plane->dc_hw_update_cursor_hi_addr = pe220x_dc_hw_update_cursor_hi_addr;
gpu/drm/phytium/phytium_plane.c:662: phytium_plane->dc_hw_plane_get_format(&format_modifiers, &formats, &format_count);
gpu/drm/phytium/phytium_plane.c:663: ret = drm_universal_plane_init(dev, &phytium_plane->base, 0x0,
gpu/drm/phytium/phytium_plane.c:664: &phytium_plane_funcs,
gpu/drm/phytium/phytium_plane.c:673: drm_plane_create_rotation_property(&phytium_plane->base, DRM_MODE_ROTATE_0, flags);
gpu/drm/phytium/phytium_plane.c:674: drm_plane_helper_add(&phytium_plane->base, &phytium_plane_helper_funcs);
gpu/drm/phytium/phytium_plane.c:676: return phytium_plane;
gpu/drm/phytium/phytium_plane.c:678: kfree(phytium_plane_state);
gpu/drm/phytium/phytium_plane.c:680: kfree(phytium_plane);
gpu/drm/phytium/phytium_panel.c:11:#include "phytium_display_drv.h"
gpu/drm/phytium/phytium_panel.c:12:#include "phytium_dp.h"
gpu/drm/phytium/phytium_panel.c:13:#include "phytium_panel.h"
gpu/drm/phytium/phytium_panel.c:16:phytium_dp_aux_set_backlight(struct phytium_panel *panel, unsigned int level)
gpu/drm/phytium/phytium_panel.c:18: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:22: if (phytium_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) {
gpu/drm/phytium/phytium_panel.c:27: if (drm_dp_dpcd_write(&phytium_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
gpu/drm/phytium/phytium_panel.c:36:static unsigned int phytium_dp_aux_get_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:40: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:42: if (drm_dp_dpcd_read(&phytium_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
gpu/drm/phytium/phytium_panel.c:50: if (phytium_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
gpu/drm/phytium/phytium_panel.c:56:static void set_aux_backlight_enable(struct phytium_panel *panel, bool enable)
gpu/drm/phytium/phytium_panel.c:59: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:61: if (!(phytium_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP))
gpu/drm/phytium/phytium_panel.c:64: if (drm_dp_dpcd_readb(&phytium_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
gpu/drm/phytium/phytium_panel.c:76: if (drm_dp_dpcd_writeb(&phytium_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
gpu/drm/phytium/phytium_panel.c:83:static void phytium_dp_aux_enable_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:86: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:88: if (drm_dp_dpcd_readb(&phytium_dp->aux,
gpu/drm/phytium/phytium_panel.c:113: if (drm_dp_dpcd_writeb(&phytium_dp->aux,
gpu/drm/phytium/phytium_panel.c:120: phytium_dp_aux_set_backlight(panel, panel->level);
gpu/drm/phytium/phytium_panel.c:123:static void phytium_dp_aux_disable_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:128:static void phytium_dp_aux_setup_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:130: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:132: if (phytium_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT)
gpu/drm/phytium/phytium_panel.c:133: phytium_dp->panel.max = 0xFFFF;
gpu/drm/phytium/phytium_panel.c:135: phytium_dp->panel.max = 0xFF;
gpu/drm/phytium/phytium_panel.c:137: phytium_dp->panel.min = 0;
gpu/drm/phytium/phytium_panel.c:138: phytium_dp->panel.level = phytium_dp_aux_get_backlight(panel);
gpu/drm/phytium/phytium_panel.c:139: phytium_dp->panel.backlight_enabled = (phytium_dp->panel.level != 0);
gpu/drm/phytium/phytium_panel.c:142:static void phytium_dp_hw_poweron_panel(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:144: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:146: phytium_dp->funcs->dp_hw_poweron_panel(phytium_dp);
gpu/drm/phytium/phytium_panel.c:149:static void phytium_dp_hw_poweroff_panel(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:151: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:153: phytium_dp->funcs->dp_hw_poweroff_panel(phytium_dp);
gpu/drm/phytium/phytium_panel.c:157:phytium_dp_hw_set_backlight(struct phytium_panel *panel, uint32_t level)
gpu/drm/phytium/phytium_panel.c:160: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:162: ret = phytium_dp->funcs->dp_hw_set_backlight(phytium_dp, level);
gpu/drm/phytium/phytium_panel.c:167:static uint32_t phytium_dp_hw_get_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:170: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:172: ret = phytium_dp->funcs->dp_hw_get_backlight(phytium_dp);
gpu/drm/phytium/phytium_panel.c:177:static void phytium_dp_hw_enable_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:179: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:181: phytium_dp->funcs->dp_hw_set_backlight(phytium_dp, phytium_dp->panel.level);
gpu/drm/phytium/phytium_panel.c:182: phytium_dp->funcs->dp_hw_enable_backlight(phytium_dp);
gpu/drm/phytium/phytium_panel.c:185:static void phytium_dp_hw_disable_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:187: struct phytium_dp_device *phytium_dp = panel_to_dp_device(panel);
gpu/drm/phytium/phytium_panel.c:189: phytium_dp->funcs->dp_hw_disable_backlight(phytium_dp);
gpu/drm/phytium/phytium_panel.c:192:static void phytium_dp_hw_setup_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:195: struct phytium_display_private *priv = dev->dev_private;
gpu/drm/phytium/phytium_panel.c:199: panel->level = phytium_dp_hw_get_backlight(panel);
gpu/drm/phytium/phytium_panel.c:202:void phytium_dp_panel_init_backlight_funcs(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_panel.c:204: if (phytium_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP &&
gpu/drm/phytium/phytium_panel.c:205: (phytium_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) &&
gpu/drm/phytium/phytium_panel.c:206: !(phytium_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)) {
gpu/drm/phytium/phytium_panel.c:208: phytium_dp->panel.setup_backlight = phytium_dp_aux_setup_backlight;
gpu/drm/phytium/phytium_panel.c:209: phytium_dp->panel.enable_backlight = phytium_dp_aux_enable_backlight;
gpu/drm/phytium/phytium_panel.c:210: phytium_dp->panel.disable_backlight = phytium_dp_aux_disable_backlight;
gpu/drm/phytium/phytium_panel.c:211: phytium_dp->panel.set_backlight = phytium_dp_aux_set_backlight;
gpu/drm/phytium/phytium_panel.c:212: phytium_dp->panel.get_backlight = phytium_dp_aux_get_backlight;
gpu/drm/phytium/phytium_panel.c:215: phytium_dp->panel.setup_backlight = phytium_dp_hw_setup_backlight;
gpu/drm/phytium/phytium_panel.c:216: phytium_dp->panel.enable_backlight = phytium_dp_hw_enable_backlight;
gpu/drm/phytium/phytium_panel.c:217: phytium_dp->panel.disable_backlight = phytium_dp_hw_disable_backlight;
gpu/drm/phytium/phytium_panel.c:218: phytium_dp->panel.set_backlight = phytium_dp_hw_set_backlight;
gpu/drm/phytium/phytium_panel.c:219: phytium_dp->panel.get_backlight = phytium_dp_hw_get_backlight;
gpu/drm/phytium/phytium_panel.c:221: phytium_dp->panel.poweron = phytium_dp_hw_poweron_panel;
gpu/drm/phytium/phytium_panel.c:222: phytium_dp->panel.poweroff = phytium_dp_hw_poweroff_panel;
gpu/drm/phytium/phytium_panel.c:223: mutex_init(&phytium_dp->panel.panel_lock);
gpu/drm/phytium/phytium_panel.c:224: phytium_dp->panel.dev = phytium_dp->dev;
gpu/drm/phytium/phytium_panel.c:227: phytium_dp->panel.panel_power_up_delay = 210; /* t1_t3 */
gpu/drm/phytium/phytium_panel.c:228: phytium_dp->panel.backlight_on_delay = 50; /* t7 */
gpu/drm/phytium/phytium_panel.c:229: phytium_dp->panel.backlight_off_delay = 50;
gpu/drm/phytium/phytium_panel.c:230: phytium_dp->panel.panel_power_down_delay = 0; /* t10 */
gpu/drm/phytium/phytium_panel.c:231: phytium_dp->panel.panel_power_cycle_delay = 510; /* t11 + t12 */
gpu/drm/phytium/phytium_panel.c:234:void phytium_dp_panel_release_backlight_funcs(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_panel.c:236: phytium_dp->panel.setup_backlight = NULL;
gpu/drm/phytium/phytium_panel.c:237: phytium_dp->panel.enable_backlight = NULL;
gpu/drm/phytium/phytium_panel.c:238: phytium_dp->panel.disable_backlight = NULL;
gpu/drm/phytium/phytium_panel.c:239: phytium_dp->panel.set_backlight = NULL;
gpu/drm/phytium/phytium_panel.c:240: phytium_dp->panel.get_backlight = NULL;
gpu/drm/phytium/phytium_panel.c:241: phytium_dp->panel.poweron = NULL;
gpu/drm/phytium/phytium_panel.c:242: phytium_dp->panel.poweroff = NULL;
gpu/drm/phytium/phytium_panel.c:245:void phytium_panel_enable_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:257:void phytium_panel_disable_backlight(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:268:void phytium_panel_poweron(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:279:void phytium_panel_poweroff(struct phytium_panel *panel)
gpu/drm/phytium/phytium_panel.c:290:static uint32_t phytium_scale(uint32_t source_val,
gpu/drm/phytium/phytium_panel.c:311:phytium_scale_hw_to_user(struct phytium_panel *panel, uint32_t hw_level, uint32_t user_max)
gpu/drm/phytium/phytium_panel.c:313: return phytium_scale(hw_level, panel->min, panel->max,
gpu/drm/phytium/phytium_panel.c:318:phytium_scale_user_to_hw(struct phytium_panel *panel, u32 user_level, u32 user_max)
gpu/drm/phytium/phytium_panel.c:320: return phytium_scale(user_level, 0, user_max,
gpu/drm/phytium/phytium_panel.c:324:static int phytium_backlight_device_update_status(struct backlight_device *bd)
gpu/drm/phytium/phytium_panel.c:326: struct phytium_panel *panel = bl_get_data(bd);
gpu/drm/phytium/phytium_panel.c:331: DRM_DEBUG_KMS("updating phytium_backlight, brightness=%d/%d\n",
gpu/drm/phytium/phytium_panel.c:334: hw_level = phytium_scale_user_to_hw(panel, bd->props.brightness, bd->props.max_brightness);
gpu/drm/phytium/phytium_panel.c:347:static int phytium_backlight_device_get_brightness(struct backlight_device *bd)
gpu/drm/phytium/phytium_panel.c:349: struct phytium_panel *panel = bl_get_data(bd);
gpu/drm/phytium/phytium_panel.c:362: ret = phytium_scale_hw_to_user(panel, hw_level, bd->props.max_brightness);
gpu/drm/phytium/phytium_panel.c:363: DRM_DEBUG_KMS("get phytium_backlight, brightness=%d/%d\n",
gpu/drm/phytium/phytium_panel.c:369:static const struct backlight_ops phytium_backlight_device_ops = {
gpu/drm/phytium/phytium_panel.c:370: .update_status = phytium_backlight_device_update_status,
gpu/drm/phytium/phytium_panel.c:371: .get_brightness = phytium_backlight_device_get_brightness,
gpu/drm/phytium/phytium_panel.c:374:int phytium_edp_backlight_device_register(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_panel.c:379: if (phytium_dp->panel.setup_backlight) {
gpu/drm/phytium/phytium_panel.c:380: mutex_lock(&phytium_dp->panel.panel_lock);
gpu/drm/phytium/phytium_panel.c:381: phytium_dp->panel.setup_backlight(&phytium_dp->panel);
gpu/drm/phytium/phytium_panel.c:382: mutex_unlock(&phytium_dp->panel.panel_lock);
gpu/drm/phytium/phytium_panel.c:390: props.brightness = phytium_scale_hw_to_user(&phytium_dp->panel, phytium_dp->panel.level,
gpu/drm/phytium/phytium_panel.c:392: snprintf(bl_name, sizeof(bl_name), "phytium_bl%d", phytium_dp->port);
gpu/drm/phytium/phytium_panel.c:394: phytium_dp->panel.bl_device =
gpu/drm/phytium/phytium_panel.c:396: phytium_dp->connector.kdev,
gpu/drm/phytium/phytium_panel.c:397: &phytium_dp->panel,
gpu/drm/phytium/phytium_panel.c:398: &phytium_backlight_device_ops,
gpu/drm/phytium/phytium_panel.c:401: if (IS_ERR(phytium_dp->panel.bl_device)) {
gpu/drm/phytium/phytium_panel.c:403: PTR_ERR(phytium_dp->panel.bl_device));
gpu/drm/phytium/phytium_panel.c:404: phytium_dp->panel.bl_device = NULL;
gpu/drm/phytium/phytium_panel.c:409: phytium_dp->connector.name);
gpu/drm/phytium/phytium_panel.c:414:void phytium_edp_backlight_device_unregister(struct phytium_dp_device *phytium_dp)
gpu/drm/phytium/phytium_panel.c:416: if (phytium_dp->panel.bl_device) {
gpu/drm/phytium/phytium_panel.c:417: backlight_device_unregister(phytium_dp->panel.bl_device);
gpu/drm/phytium/phytium_panel.c:418: phytium_dp->panel.bl_device = NULL;
gpu/drm/phytium/phytium_crtc.h:10:struct phytium_crtc {
gpu/drm/phytium/phytium_crtc.h:30:struct phytium_crtc_state {
gpu/drm/phytium/phytium_crtc.h:34:#define to_phytium_crtc(x) container_of(x, struct phytium_crtc, base)
gpu/drm/phytium/phytium_crtc.h:35:#define to_phytium_crtc_state(x) container_of(x, struct phytium_crtc_state, base)
gpu/drm/phytium/phytium_crtc.h:37:void phytium_crtc_resume(struct drm_device *drm_dev);
gpu/drm/phytium/phytium_crtc.h:38:int phytium_crtc_init(struct drm_device *dev, int pipe);
gpu/drm/phytium/px210_dc.h:15:extern void px210_dc_hw_vram_init(struct phytium_display_private *priv,
gpu/drm/phytium/px210_dc.h:18:extern void px210_dc_hw_clear_msi_irq(struct phytium_display_private *priv, uint32_t phys_pipe);
gpu/drm/phytium/px210_reg.h:10:#include "phytium_reg.h"
gpu/drm/phytium/Makefile:1:phytium-dc-drm-y := phytium_display_drv.o \
gpu/drm/phytium/Makefile:2: phytium_plane.o \
gpu/drm/phytium/Makefile:3: phytium_crtc.o \
gpu/drm/phytium/Makefile:4: phytium_dp.o \
gpu/drm/phytium/Makefile:5: phytium_fb.o \
gpu/drm/phytium/Makefile:6: phytium_gem.o \
gpu/drm/phytium/Makefile:7: phytium_fbdev.o \
gpu/drm/phytium/Makefile:8: phytium_debugfs.o \
gpu/drm/phytium/Makefile:10: phytium_panel.o \
gpu/drm/phytium/Makefile:12: phytium_pci.o \
gpu/drm/phytium/Makefile:15: phytium_platform.o
gpu/drm/phytium/Makefile:17:obj-$(CONFIG_DRM_PHYTIUM) += phytium-dc-drm.o
gpu/drm/phytium/Makefile:18:CFLAGS_REMOVE_phytium_crtc.o += -mgeneral-regs-only
gpu/drm/phytium/phytium_dp.h:14:struct phytium_dp_device;
gpu/drm/phytium/phytium_dp.h:16:#include "phytium_panel.h"
gpu/drm/phytium/phytium_dp.h:31:struct phytium_dp_compliance {
gpu/drm/phytium/phytium_dp.h:39:struct phytium_dp_func {
gpu/drm/phytium/phytium_dp.h:40: uint8_t (*dp_hw_get_source_lane_count)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:41: int (*dp_hw_reset)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:42: bool (*dp_hw_spread_is_enable)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:43: int (*dp_hw_set_backlight)(struct phytium_dp_device *phytium_dp, uint32_t level);
gpu/drm/phytium/phytium_dp.h:44: uint32_t (*dp_hw_get_backlight)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:45: void (*dp_hw_disable_backlight)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:46: void (*dp_hw_enable_backlight)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:47: void (*dp_hw_poweroff_panel)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:48: void (*dp_hw_poweron_panel)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:49: int (*dp_hw_init_phy)(struct phytium_dp_device *phytium_dp);
gpu/drm/phytium/phytium_dp.h:50: void (*dp_hw_set_phy_lane_setting)(struct phytium_dp_device *phytium_dp,
gpu/drm/phytium/phytium_dp.h:52: int (*dp_hw_set_phy_lane_and_rate)(struct phytium_dp_device *phytium_dp,
gpu/drm/phytium/phytium_dp.h:57:struct phytium_dp_hpd_state {
gpu/drm/phytium/phytium_dp.h:64:struct phytium_dp_device {
gpu/drm/phytium/phytium_dp.h:109: struct phytium_dp_compliance compliance;
gpu/drm/phytium/phytium_dp.h:110: struct phytium_dp_func *funcs;
gpu/drm/phytium/phytium_dp.h:111: struct phytium_dp_hpd_state dp_hpd_state;
gpu/drm/phytium/phytium_dp.h:113: struct phytium_panel panel;
gpu/drm/phytium/phytium_dp.h:117:union phytium_phy_tp {
gpu/drm/phytium/phytium_dp.h:131:enum phytium_dpcd_phy_tp {
gpu/drm/phytium/phytium_dp.h:142:#define encoder_to_dp_device(x) container_of(x, struct phytium_dp_device, encoder)
gpu/drm/phytium/phytium_dp.h:143:#define connector_to_dp_device(x) container_of(x, struct phytium_dp_device, connector)
gpu/drm/phytium/phytium_dp.h:144:#define panel_to_dp_device(x) container_of(x, struct phytium_dp_device, panel)
gpu/drm/phytium/phytium_dp.h:145:#define train_retry_to_dp_device(x) container_of(x, struct phytium_dp_device, train_retry_work)
gpu/drm/phytium/phytium_dp.h:146:void phytium_phy_writel(struct phytium_dp_device *phytium_dp, uint32_t address, uint32_t data);
gpu/drm/phytium/phytium_dp.h:147:uint32_t phytium_phy_readl(struct phytium_dp_device *phytium_dp, uint32_t address);
gpu/drm/phytium/phytium_dp.h:149:int phytium_dp_init(struct drm_device *dev, int pipe);
gpu/drm/phytium/phytium_dp.h:150:int phytium_dp_resume(struct drm_device *drm_dev);
gpu/drm/phytium/phytium_dp.h:151:void phytium_dp_hpd_irq_setup(struct drm_device *dev, bool enable);
gpu/drm/phytium/phytium_dp.h:152:irqreturn_t phytium_dp_hpd_irq_handler(struct phytium_display_private *priv);
gpu/drm/phytium/phytium_dp.h:153:void phytium_dp_hpd_work_func(struct work_struct *work);
gpu/drm/phytium/phytium_dp.h:154:const struct dp_audio_n_m *phytium_dp_audio_get_n_m(int link_rate, int sample_rate);
gpu/drm/Kconfig:398:source "drivers/gpu/drm/phytium/Kconfig"
gpu/drm/Makefile:128:obj-$(CONFIG_DRM_PHYTIUM) += phytium/
spi/spi-phytium-pci.c:23:#include "spi-phytium.h"
spi/spi-phytium-pci.c:25:#define DRIVER_NAME "phytium_spi_pci"
spi/spi-phytium-pci.c:27:static int phytium_spi_pci_probe(struct pci_dev *pdev,
spi/spi-phytium-pci.c:30: struct phytium_spi *fts;
spi/spi-phytium-pci.c:34: fts = devm_kzalloc(&pdev->dev, sizeof(struct phytium_spi),
spi/spi-phytium-pci.c:69: ret = phytium_spi_add_host(&pdev->dev, fts);
spi/spi-phytium-pci.c:77:static void phytium_spi_pci_remove(struct pci_dev *pdev)
spi/spi-phytium-pci.c:79: struct phytium_spi *fts = pci_get_drvdata(pdev);
spi/spi-phytium-pci.c:81: phytium_spi_remove_host(fts);
spi/spi-phytium-pci.c:88: struct phytium_spi *fts = dev_get_drvdata(dev);
spi/spi-phytium-pci.c:90: return phytium_spi_suspend_host(fts);
spi/spi-phytium-pci.c:95: struct phytium_spi *fts = dev_get_drvdata(dev);
spi/spi-phytium-pci.c:97: return phytium_spi_resume_host(fts);
spi/spi-phytium-pci.c:101:static SIMPLE_DEV_PM_OPS(phytium_spi_pm_ops, spi_suspend, spi_resume);
spi/spi-phytium-pci.c:103:static const struct pci_device_id phytium_device_pci_tbl[] = {
spi/spi-phytium-pci.c:108:static struct pci_driver phytium_spi_pci_driver = {
spi/spi-phytium-pci.c:110: .id_table = phytium_device_pci_tbl,
spi/spi-phytium-pci.c:111: .probe = phytium_spi_pci_probe,
spi/spi-phytium-pci.c:112: .remove = phytium_spi_pci_remove,
spi/spi-phytium-pci.c:114: .pm = &phytium_spi_pm_ops,
spi/spi-phytium-pci.c:118:module_pci_driver(phytium_spi_pci_driver);
spi/spi-phytium-pci.c:120:MODULE_AUTHOR("Yiqun Zhang <zhangyiqun@phytium.com.cn>");
spi/spi-phytium.c:24:#include "spi-phytium.h"
spi/spi-phytium.c:26:struct phytium_spi_chip {
spi/spi-phytium.c:44:static void phytium_spi_set_cs(struct spi_device *spi, bool enable)
spi/spi-phytium.c:46: struct phytium_spi *fts = spi_master_get_devdata(spi->master);
spi/spi-phytium.c:54: phytium_writel(fts, SER, BIT(spi->chip_select));
spi/spi-phytium.c:56: origin = phytium_readl(fts, GCSR);
spi/spi-phytium.c:57: phytium_writel(fts, GCSR, origin | (1 << spi->chip_select));
spi/spi-phytium.c:61: origin = phytium_readl(fts, GCSR);
spi/spi-phytium.c:62: phytium_writel(fts, GCSR, origin & ~(1 << spi->chip_select));
spi/spi-phytium.c:67:static inline u32 tx_max(struct phytium_spi *fts)
spi/spi-phytium.c:72: tx_room = fts->fifo_len - phytium_readl(fts, TXFLR);
spi/spi-phytium.c:80:static inline u32 rx_max(struct phytium_spi *fts)
spi/spi-phytium.c:84: return min_t(u32, rx_left, phytium_readl(fts, RXFLR));
spi/spi-phytium.c:87:static void phytium_writer(struct phytium_spi *fts)
spi/spi-phytium.c:99: phytium_write_io_reg(fts, DR, txw);
spi/spi-phytium.c:104:static void phytium_reader(struct phytium_spi *fts)
spi/spi-phytium.c:110: rxw = phytium_read_io_reg(fts, DR);
spi/spi-phytium.c:121:int phytium_spi_check_status(struct phytium_spi *fts, bool raw)
spi/spi-phytium.c:127: irq_status = phytium_readl(fts, RISR);
spi/spi-phytium.c:129: irq_status = phytium_readl(fts, ISR);
spi/spi-phytium.c:155:EXPORT_SYMBOL_GPL(phytium_spi_check_status);
spi/spi-phytium.c:157:static void int_error_stop(struct phytium_spi *fts, const char *msg)
spi/spi-phytium.c:166:static irqreturn_t interrupt_transfer(struct phytium_spi *fts)
spi/spi-phytium.c:168: u16 irq_status = phytium_readl(fts, ISR);
spi/spi-phytium.c:171: phytium_readl(fts, ICR);
spi/spi-phytium.c:176: phytium_reader(fts);
spi/spi-phytium.c:184: phytium_writer(fts);
spi/spi-phytium.c:191:static irqreturn_t phytium_spi_irq(int irq, void *dev_id)
spi/spi-phytium.c:194: struct phytium_spi *fts = spi_master_get_devdata(master);
spi/spi-phytium.c:195: u16 irq_status = phytium_readl(fts, ISR) & 0x3f;
spi/spi-phytium.c:211:static int poll_transfer(struct phytium_spi *fts)
spi/spi-phytium.c:214: phytium_writer(fts);
spi/spi-phytium.c:215: phytium_reader(fts);
spi/spi-phytium.c:222:static int phytium_spi_transfer_one(struct spi_master *master,
spi/spi-phytium.c:225: struct phytium_spi *fts = spi_master_get_devdata(master);
spi/spi-phytium.c:279: phytium_writel(fts, CTRLR0, cr0);
spi/spi-phytium.c:297: phytium_writel(fts, TXFLTR, txlevel);
spi/spi-phytium.c:317:static void phytium_spi_handle_err(struct spi_master *master,
spi/spi-phytium.c:320: struct phytium_spi *fts = spi_master_get_devdata(master);
spi/spi-phytium.c:328:static int phytium_spi_setup(struct spi_device *spi)
spi/spi-phytium.c:330: struct phytium_spi_chip *chip_info = NULL;
spi/spi-phytium.c:333: struct phytium_spi *fts = spi_master_get_devdata(master);
spi/spi-phytium.c:362: phytium_writel(fts, CTRLR0, cr0);
spi/spi-phytium.c:376:static void phytium_spi_cleanup(struct spi_device *spi)
spi/spi-phytium.c:384:static void spi_hw_init(struct device *dev, struct phytium_spi *fts)
spi/spi-phytium.c:392: phytium_writel(fts, TXFLTR, fifo);
spi/spi-phytium.c:393: if (fifo != phytium_readl(fts, TXFLTR))
spi/spi-phytium.c:396: phytium_writel(fts, TXFLTR, 0);
spi/spi-phytium.c:403:int phytium_spi_add_host(struct device *dev, struct phytium_spi *fts)
spi/spi-phytium.c:416: snprintf(fts->name, sizeof(fts->name), "phytium_spi%d", fts->bus_num);
spi/spi-phytium.c:420: ret = request_irq(fts->irq, phytium_spi_irq, IRQF_SHARED, fts->name, master);
spi/spi-phytium.c:430: master->setup = phytium_spi_setup;
spi/spi-phytium.c:431: master->cleanup = phytium_spi_cleanup;
spi/spi-phytium.c:432: master->set_cs = phytium_spi_set_cs;
spi/spi-phytium.c:433: master->transfer_one = phytium_spi_transfer_one;
spi/spi-phytium.c:434: master->handle_err = phytium_spi_handle_err;
spi/spi-phytium.c:469:EXPORT_SYMBOL_GPL(phytium_spi_add_host);
spi/spi-phytium.c:471:void phytium_spi_remove_host(struct phytium_spi *fts)
spi/spi-phytium.c:479:EXPORT_SYMBOL_GPL(phytium_spi_remove_host);
spi/spi-phytium.c:481:int phytium_spi_suspend_host(struct phytium_spi *fts)
spi/spi-phytium.c:492:EXPORT_SYMBOL_GPL(phytium_spi_suspend_host);
spi/spi-phytium.c:494:int phytium_spi_resume_host(struct phytium_spi *fts)
spi/spi-phytium.c:504:EXPORT_SYMBOL_GPL(phytium_spi_resume_host);
spi/spi-phytium.c:506:MODULE_AUTHOR("Zhu Mingshuai <zhumingshuai@phytium.com.cn>");
spi/spi-phytium.c:507:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
spi/spi-phytium-dma.c:3: * Special handling for phytium DMA core
spi/spi-phytium-dma.c:15:#include "spi-phytium.h"
spi/spi-phytium-dma.c:24:static void phytium_spi_dma_maxburst_init(struct phytium_spi *fts)
spi/spi-phytium-dma.c:39: phytium_writel(fts, DMARDLR, 0x0);
spi/spi-phytium-dma.c:60: phytium_writel(fts, DMATDLR, 0);
spi/spi-phytium-dma.c:63:static void phytium_spi_dma_sg_burst_init(struct phytium_spi *fts)
spi/spi-phytium-dma.c:80:static int phytium_spi_dma_init(struct device *dev, struct phytium_spi *fts)
spi/spi-phytium-dma.c:98: phytium_spi_dma_maxburst_init(fts);
spi/spi-phytium-dma.c:99: phytium_spi_dma_sg_burst_init(fts);
spi/spi-phytium-dma.c:104:static void phytium_spi_dma_exit(struct phytium_spi *fts)
spi/spi-phytium-dma.c:117:static irqreturn_t phytium_spi_dma_transfer_handler(struct phytium_spi *fts)
spi/spi-phytium-dma.c:119: phytium_spi_check_status(fts, false);
spi/spi-phytium-dma.c:126:static bool phytium_spi_can_dma(struct spi_controller *master,
spi/spi-phytium-dma.c:129: struct phytium_spi *fts = spi_controller_get_devdata(master);
spi/spi-phytium-dma.c:134:static enum dma_slave_buswidth phytium_spi_dma_convert_width(u8 n_bytes)
spi/spi-phytium-dma.c:144:static int phytium_spi_dma_wait(struct phytium_spi *fts, unsigned int len,
spi/spi-phytium-dma.c:168:static inline bool phytium_spi_dma_tx_busy(struct phytium_spi *fts)
spi/spi-phytium-dma.c:170: return !(phytium_readl(fts, SR) & SR_TF_EMPT);
spi/spi-phytium-dma.c:173:static int phytium_spi_dma_wait_tx_done(struct phytium_spi *fts,
spi/spi-phytium-dma.c:180: nents = phytium_readl(fts, TXFLR);
spi/spi-phytium-dma.c:184: while (phytium_spi_dma_tx_busy(fts) && retry--)
spi/spi-phytium-dma.c:199:static void phytium_spi_dma_tx_done(void *arg)
spi/spi-phytium-dma.c:201: struct phytium_spi *fts = arg;
spi/spi-phytium-dma.c:210:static int phytium_spi_dma_config_tx(struct phytium_spi *fts)
spi/spi-phytium-dma.c:219: txconf.dst_addr_width = phytium_spi_dma_convert_width(fts->n_bytes);
spi/spi-phytium-dma.c:225:static int phytium_spi_dma_submit_tx(struct phytium_spi *fts, struct scatterlist *sgl,
spi/spi-phytium-dma.c:238: txdesc->callback = phytium_spi_dma_tx_done;
spi/spi-phytium-dma.c:253:static inline bool phytium_spi_dma_rx_busy(struct phytium_spi *fts)
spi/spi-phytium-dma.c:255: return !!(phytium_readl(fts, SR) & SR_RF_NOT_EMPT);
spi/spi-phytium-dma.c:258:static int phytium_spi_dma_wait_rx_done(struct phytium_spi *fts)
spi/spi-phytium-dma.c:271: * without PREADY signal utilized (which is true for the phytium APB SSI
spi/spi-phytium-dma.c:274: nents = phytium_readl(fts, RXFLR);
spi/spi-phytium-dma.c:285: while (phytium_spi_dma_rx_busy(fts) && retry--)
spi/spi-phytium-dma.c:300:static void phytium_spi_dma_rx_done(void *arg)
spi/spi-phytium-dma.c:302: struct phytium_spi *fts = arg;
spi/spi-phytium-dma.c:311:static int phytium_spi_dma_config_rx(struct phytium_spi *fts)
spi/spi-phytium-dma.c:320: rxconf.src_addr_width = phytium_spi_dma_convert_width(fts->n_bytes);
spi/spi-phytium-dma.c:326:static int phytium_spi_dma_submit_rx(struct phytium_spi *fts, struct scatterlist *sgl,
spi/spi-phytium-dma.c:339: rxdesc->callback = phytium_spi_dma_rx_done;
spi/spi-phytium-dma.c:354:static int phytium_spi_dma_setup(struct phytium_spi *fts, struct spi_transfer *xfer)
spi/spi-phytium-dma.c:363: ret = phytium_spi_dma_config_tx(fts);
spi/spi-phytium-dma.c:368: ret = phytium_spi_dma_config_rx(fts);
spi/spi-phytium-dma.c:377: phytium_writel(fts, DMACR, dma_ctrl);
spi/spi-phytium-dma.c:388: fts->transfer_handler = phytium_spi_dma_transfer_handler;
spi/spi-phytium-dma.c:393:static int phytium_spi_dma_transfer_all(struct phytium_spi *fts,
spi/spi-phytium-dma.c:399: ret = phytium_spi_dma_submit_tx(fts, xfer->tx_sg.sgl, xfer->tx_sg.nents);
spi/spi-phytium-dma.c:405: ret = phytium_spi_dma_submit_rx(fts, xfer->rx_sg.sgl,
spi/spi-phytium-dma.c:416: ret = phytium_spi_dma_wait(fts, xfer->len, xfer->effective_speed_hz);
spi/spi-phytium-dma.c:419: phytium_writel(fts, DMACR, 0);
spi/spi-phytium-dma.c:424:static int phytium_spi_dma_transfer_one(struct phytium_spi *fts,
spi/spi-phytium-dma.c:461: ret = phytium_spi_dma_submit_tx(fts, &tx_tmp, 1);
spi/spi-phytium-dma.c:466: ret = phytium_spi_dma_submit_rx(fts, &rx_tmp, 1);
spi/spi-phytium-dma.c:481: ret = phytium_spi_dma_wait(fts, len, xfer->effective_speed_hz);
spi/spi-phytium-dma.c:493: phytium_writel(fts, DMACR, 0);
spi/spi-phytium-dma.c:498:static int phytium_spi_dma_transfer(struct phytium_spi *fts, struct spi_transfer *xfer)
spi/spi-phytium-dma.c:510: ret = phytium_spi_dma_transfer_all(fts, xfer);
spi/spi-phytium-dma.c:512: ret = phytium_spi_dma_transfer_one(fts, xfer);
spi/spi-phytium-dma.c:517: ret = phytium_spi_dma_wait_tx_done(fts, xfer);
spi/spi-phytium-dma.c:523: ret = phytium_spi_dma_wait_rx_done(fts);
spi/spi-phytium-dma.c:528:static void phytium_spi_dma_stop(struct phytium_spi *fts)
spi/spi-phytium-dma.c:540:static const struct phytium_spi_dma_ops phytium_spi_dma_generic_ops = {
spi/spi-phytium-dma.c:541: .dma_init = phytium_spi_dma_init,
spi/spi-phytium-dma.c:542: .dma_exit = phytium_spi_dma_exit,
spi/spi-phytium-dma.c:543: .dma_setup = phytium_spi_dma_setup,
spi/spi-phytium-dma.c:544: .can_dma = phytium_spi_can_dma,
spi/spi-phytium-dma.c:545: .dma_transfer = phytium_spi_dma_transfer,
spi/spi-phytium-dma.c:546: .dma_stop = phytium_spi_dma_stop,
spi/spi-phytium-dma.c:549:void phytium_spi_dmaops_set(struct phytium_spi *fts)
spi/spi-phytium-dma.c:551: fts->dma_ops = &phytium_spi_dma_generic_ops;
spi/spi-phytium-dma.c:553:EXPORT_SYMBOL_GPL(phytium_spi_dmaops_set);
spi/spi-phytium.h:57:struct phytium_spi;
spi/spi-phytium.h:59:struct phytium_spi_dma_ops {
spi/spi-phytium.h:60: int (*dma_init)(struct device *dev, struct phytium_spi *fts);
spi/spi-phytium.h:61: void (*dma_exit)(struct phytium_spi *fts);
spi/spi-phytium.h:62: int (*dma_setup)(struct phytium_spi *fts, struct spi_transfer *xfer);
spi/spi-phytium.h:65: int (*dma_transfer)(struct phytium_spi *fts, struct spi_transfer *xfer);
spi/spi-phytium.h:66: void (*dma_stop)(struct phytium_spi *fts);
spi/spi-phytium.h:69:struct phytium_spi {
spi/spi-phytium.h:94: irqreturn_t (*transfer_handler)(struct phytium_spi *fts);
spi/spi-phytium.h:105: const struct phytium_spi_dma_ops *dma_ops;
spi/spi-phytium.h:109:static inline u32 phytium_readl(struct phytium_spi *fts, u32 offset)
spi/spi-phytium.h:114:static inline u16 phytium_readw(struct phytium_spi *fts, u32 offset)
spi/spi-phytium.h:119:static inline void phytium_writel(struct phytium_spi *fts, u32 offset, u32 val)
spi/spi-phytium.h:124:static inline void phytium_writew(struct phytium_spi *fts, u32 offset, u16 val)
spi/spi-phytium.h:129:static inline u32 phytium_read_io_reg(struct phytium_spi *fts, u32 offset)
spi/spi-phytium.h:133: return phytium_readw(fts, offset);
spi/spi-phytium.h:136: return phytium_readl(fts, offset);
spi/spi-phytium.h:140:static inline void phytium_write_io_reg(struct phytium_spi *fts, u32 offset, u32 val)
spi/spi-phytium.h:144: phytium_writew(fts, offset, val);
spi/spi-phytium.h:148: phytium_writel(fts, offset, val);
spi/spi-phytium.h:153:static inline void spi_enable_chip(struct phytium_spi *fts, int enable)
spi/spi-phytium.h:155: phytium_writel(fts, SSIENR, (enable ? 1 : 0));
spi/spi-phytium.h:158:static inline void spi_set_clk(struct phytium_spi *fts, u16 div)
spi/spi-phytium.h:160: phytium_writel(fts, BAUDR, div);
spi/spi-phytium.h:163:static inline void spi_mask_intr(struct phytium_spi *fts, u32 mask)
spi/spi-phytium.h:167: new_mask = phytium_readl(fts, IMR) & ~mask;
spi/spi-phytium.h:168: phytium_writel(fts, IMR, new_mask);
spi/spi-phytium.h:171:static inline void spi_umask_intr(struct phytium_spi *fts, u32 mask)
spi/spi-phytium.h:175: new_mask = phytium_readl(fts, IMR) | mask;
spi/spi-phytium.h:176: phytium_writel(fts, IMR, new_mask);
spi/spi-phytium.h:179:static inline void spi_global_cs(struct phytium_spi *fts)
spi/spi-phytium.h:185: global_cs_en = (phytium_readl(fts, GCSR) | mask) & setmask;
spi/spi-phytium.h:187: phytium_writel(fts, GCSR, global_cs_en);
spi/spi-phytium.h:190:static inline void spi_reset_chip(struct phytium_spi *fts)
spi/spi-phytium.h:199:static inline void spi_shutdown_chip(struct phytium_spi *fts)
spi/spi-phytium.h:206:extern int phytium_spi_add_host(struct device *dev, struct phytium_spi *fts);
spi/spi-phytium.h:207:extern void phytium_spi_remove_host(struct phytium_spi *fts);
spi/spi-phytium.h:208:extern int phytium_spi_suspend_host(struct phytium_spi *fts);
spi/spi-phytium.h:209:extern int phytium_spi_resume_host(struct phytium_spi *fts);
spi/spi-phytium.h:210:extern void phytium_spi_dmaops_set(struct phytium_spi *fts);
spi/spi-phytium.h:211:extern int phytium_spi_check_status(struct phytium_spi *fts, bool raw);
spi/spi-phytium-plat.c:25:#include "spi-phytium.h"
spi/spi-phytium-plat.c:27:#define DRIVER_NAME "phytium_spi"
spi/spi-phytium-plat.c:29:static int phytium_spi_probe(struct platform_device *pdev)
spi/spi-phytium-plat.c:31: struct phytium_spi *fts;
spi/spi-phytium-plat.c:39: fts = devm_kzalloc(&pdev->dev, sizeof(struct phytium_spi),
spi/spi-phytium-plat.c:135: phytium_spi_dmaops_set(fts);
spi/spi-phytium-plat.c:138: ret = phytium_spi_add_host(&pdev->dev, fts);
spi/spi-phytium-plat.c:150:static int phytium_spi_remove(struct platform_device *pdev)
spi/spi-phytium-plat.c:152: struct phytium_spi *fts = platform_get_drvdata(pdev);
spi/spi-phytium-plat.c:154: phytium_spi_remove_host(fts);
spi/spi-phytium-plat.c:163: struct phytium_spi *fts = dev_get_drvdata(dev);
spi/spi-phytium-plat.c:165: return phytium_spi_suspend_host(fts);
spi/spi-phytium-plat.c:170: struct phytium_spi *fts = dev_get_drvdata(dev);
spi/spi-phytium-plat.c:172: return phytium_spi_resume_host(fts);
spi/spi-phytium-plat.c:176:static SIMPLE_DEV_PM_OPS(phytium_spi_pm_ops, spi_suspend, spi_resume);
spi/spi-phytium-plat.c:178:static const struct of_device_id phytium_spi_of_match[] = {
spi/spi-phytium-plat.c:179: { .compatible = "phytium,spi", .data = (void *)0 },
spi/spi-phytium-plat.c:182:MODULE_DEVICE_TABLE(of, phytium_spi_of_match);
spi/spi-phytium-plat.c:184:static const struct acpi_device_id phytium_spi_acpi_match[] = {
spi/spi-phytium-plat.c:188:MODULE_DEVICE_TABLE(acpi, phytium_spi_acpi_match);
spi/spi-phytium-plat.c:190:static struct platform_driver phytium_spi_driver = {
spi/spi-phytium-plat.c:191: .probe = phytium_spi_probe,
spi/spi-phytium-plat.c:192: .remove = phytium_spi_remove,
spi/spi-phytium-plat.c:195: .of_match_table = of_match_ptr(phytium_spi_of_match),
spi/spi-phytium-plat.c:196: .acpi_match_table = ACPI_PTR(phytium_spi_acpi_match),
spi/spi-phytium-plat.c:197: .pm = &phytium_spi_pm_ops,
spi/spi-phytium-plat.c:200:module_platform_driver(phytium_spi_driver);
spi/spi-phytium-plat.c:202:MODULE_AUTHOR("Yiqun Zhang <zhangyiqun@phytium.com.cn>");
spi/spi-phytium-qspi.c:148:struct phytium_qspi_flash {
spi/spi-phytium-qspi.c:157:struct phytium_qspi {
spi/spi-phytium-qspi.c:169: struct phytium_qspi_flash flash[PHYTIUM_QSPI_MAX_NORCHIP];
spi/spi-phytium-qspi.c:178:static bool phytium_qspi_check_buswidth(u8 width)
spi/spi-phytium-qspi.c:190:static uint phytium_spi_nor_clac_clk_div(int div)
spi/spi-phytium-qspi.c:214:static int phytium_spi_nor_protocol_encode(const struct spi_mem_op *op, u32 *code)
spi/spi-phytium-qspi.c:252:static int phytium_qspi_flash_capacity_encode(u32 size, u32 *cap)
spi/spi-phytium-qspi.c:289:static void phytium_qspi_clear_wr(struct phytium_qspi *qspi,
spi/spi-phytium-qspi.c:290: struct phytium_qspi_flash *flash)
spi/spi-phytium-qspi.c:312:static int phytium_qspi_write_port(struct phytium_qspi *qspi,
spi/spi-phytium-qspi.c:331:static int phytium_qspi_read_port(struct phytium_qspi *qspi,
spi/spi-phytium-qspi.c:354:static int phytium_qspi_adjust_op_size(struct spi_mem *mem,
spi/spi-phytium-qspi.c:363:static bool phytium_qspi_supports_op(struct spi_mem *mem,
spi/spi-phytium-qspi.c:368: ret = phytium_qspi_check_buswidth(op->cmd.buswidth);
spi/spi-phytium-qspi.c:371: ret |= phytium_qspi_check_buswidth(op->addr.buswidth);
spi/spi-phytium-qspi.c:374: ret |= phytium_qspi_check_buswidth(op->dummy.buswidth);
spi/spi-phytium-qspi.c:377: ret |= phytium_qspi_check_buswidth(op->data.buswidth);
spi/spi-phytium-qspi.c:390:static int phytium_qspi_exec_op(struct spi_mem *mem,
spi/spi-phytium-qspi.c:393: struct phytium_qspi *qspi = spi_controller_get_devdata(mem->spi->master);
spi/spi-phytium-qspi.c:394: struct phytium_qspi_flash *flash = &qspi->flash[mem->spi->chip_select];
spi/spi-phytium-qspi.c:406: ret = phytium_spi_nor_protocol_encode(op, &transfer);
spi/spi-phytium-qspi.c:438: ret = phytium_qspi_read_port(qspi, op->data.buf.in, op->data.nbytes);
spi/spi-phytium-qspi.c:444: ret = phytium_qspi_write_port(qspi, op->data.buf.out, op->data.nbytes);
spi/spi-phytium-qspi.c:458:static int phytium_qspi_dirmap_create(struct spi_mem_dirmap_desc *desc)
spi/spi-phytium-qspi.c:461: struct phytium_qspi *qspi = spi_controller_get_devdata(spi->master);
spi/spi-phytium-qspi.c:462: struct phytium_qspi_flash *flash = &qspi->flash[spi->chip_select];
spi/spi-phytium-qspi.c:480: ret = phytium_spi_nor_protocol_encode(&desc->info.op_tmpl, &transfer);
spi/spi-phytium-qspi.c:504: ret = phytium_spi_nor_protocol_encode(&desc->info.op_tmpl, &transfer);
spi/spi-phytium-qspi.c:525:static ssize_t phytium_qspi_dirmap_read(struct spi_mem_dirmap_desc *desc,
spi/spi-phytium-qspi.c:529: struct phytium_qspi *qspi = spi_controller_get_devdata(spi->master);
spi/spi-phytium-qspi.c:530: struct phytium_qspi_flash *flash = &qspi->flash[spi->chip_select];
spi/spi-phytium-qspi.c:540:static ssize_t phytium_qspi_dirmap_write(struct spi_mem_dirmap_desc *desc,
spi/spi-phytium-qspi.c:544: struct phytium_qspi *qspi = spi_controller_get_devdata(spi->master);
spi/spi-phytium-qspi.c:545: struct phytium_qspi_flash *flash = &qspi->flash[spi->chip_select];
spi/spi-phytium-qspi.c:573: phytium_qspi_clear_wr(qspi, flash);
spi/spi-phytium-qspi.c:578:static int phytium_qspi_setup(struct spi_device *spi)
spi/spi-phytium-qspi.c:581: struct phytium_qspi *qspi = spi_controller_get_devdata(ctrl);
spi/spi-phytium-qspi.c:582: struct phytium_qspi_flash *flash;
spi/spi-phytium-qspi.c:601: flash->clk_div = phytium_spi_nor_clac_clk_div(clk_div);
spi/spi-phytium-qspi.c:612:static struct spi_controller_mem_ops phytium_qspi_mem_ops = {
spi/spi-phytium-qspi.c:613: .adjust_op_size = phytium_qspi_adjust_op_size,
spi/spi-phytium-qspi.c:614: .supports_op = phytium_qspi_supports_op,
spi/spi-phytium-qspi.c:615: .exec_op = phytium_qspi_exec_op,
spi/spi-phytium-qspi.c:616: .dirmap_create = phytium_qspi_dirmap_create,
spi/spi-phytium-qspi.c:617: .dirmap_read = phytium_qspi_dirmap_read,
spi/spi-phytium-qspi.c:618: .dirmap_write = phytium_qspi_dirmap_write,
spi/spi-phytium-qspi.c:627:static struct spi_controller_mem_ops phytium_qspi_mem_ops_nodirmap = {
spi/spi-phytium-qspi.c:628: .adjust_op_size = phytium_qspi_adjust_op_size,
spi/spi-phytium-qspi.c:629: .supports_op = phytium_qspi_supports_op,
spi/spi-phytium-qspi.c:630: .exec_op = phytium_qspi_exec_op,
spi/spi-phytium-qspi.c:634: * phytium_qspi_probe - Probe method for the QSPI driver
spi/spi-phytium-qspi.c:641:static int phytium_qspi_probe(struct platform_device *pdev)
spi/spi-phytium-qspi.c:646: struct phytium_qspi *qspi;
spi/spi-phytium-qspi.c:658: ctrl->setup = phytium_qspi_setup;
spi/spi-phytium-qspi.c:713: &phytium_qspi_mem_ops_nodirmap :
spi/spi-phytium-qspi.c:714: &phytium_qspi_mem_ops;
spi/spi-phytium-qspi.c:751: ret = phytium_qspi_flash_capacity_encode(qspi->flash[0].size,
spi/spi-phytium-qspi.c:776: * phytium_qspi_remove - Remove method for the QSPI driver
spi/spi-phytium-qspi.c:785:static int phytium_qspi_remove(struct platform_device *pdev)
spi/spi-phytium-qspi.c:787: struct phytium_qspi *qspi = platform_get_drvdata(pdev);
spi/spi-phytium-qspi.c:797:static int __maybe_unused phytium_qspi_suspend(struct device *dev)
spi/spi-phytium-qspi.c:802:static int __maybe_unused phytium_qspi_resume(struct device *dev)
spi/spi-phytium-qspi.c:804: struct phytium_qspi *qspi = dev_get_drvdata(dev);
spi/spi-phytium-qspi.c:812:static const struct dev_pm_ops phytium_qspi_pm_ops = {
spi/spi-phytium-qspi.c:813: SET_SYSTEM_SLEEP_PM_OPS(phytium_qspi_suspend,
spi/spi-phytium-qspi.c:814: phytium_qspi_resume)
spi/spi-phytium-qspi.c:817:static const struct of_device_id phytium_qspi_of_match[] = {
spi/spi-phytium-qspi.c:818: { .compatible = "phytium,qspi-nor" },
spi/spi-phytium-qspi.c:821:MODULE_DEVICE_TABLE(of, phytium_qspi_of_match);
spi/spi-phytium-qspi.c:823:static struct platform_driver phytium_qspi_driver = {
spi/spi-phytium-qspi.c:824: .probe = phytium_qspi_probe,
spi/spi-phytium-qspi.c:825: .remove = phytium_qspi_remove,
spi/spi-phytium-qspi.c:827: .name = "phytium-qspi",
spi/spi-phytium-qspi.c:828: .of_match_table = of_match_ptr(phytium_qspi_of_match),
spi/spi-phytium-qspi.c:829: .pm = &phytium_qspi_pm_ops,
spi/spi-phytium-qspi.c:832:module_platform_driver(phytium_qspi_driver);
spi/spi-phytium-qspi.c:834:MODULE_AUTHOR("Chen Baozi <chenbaozi@phytium.com.cn>");
spi/Makefile:85:obj-$(CONFIG_SPI_PHYTIUM) += spi-phytium.o
spi/Makefile:86:obj-$(CONFIG_SPI_PHYTIUM_PLAT) += spi-phytium-plat.o
spi/Makefile:87:obj-$(CONFIG_SPI_PHYTIUM_PCI) += spi-phytium-pci.o
spi/Makefile:88:obj-$(CONFIG_SPI_PHYTIUM_QSPI) += spi-phytium-qspi.o
spi/Makefile:89:obj-$(CONFIG_SPI_PHYTIUM) += spi-phytium-dma.o
usb/host/xhci-plat.c:140:static const struct xhci_plat_priv xhci_plat_phytium_pe220x = {
usb/host/xhci-plat.c:186: .compatible = "phytium,pe220x-xhci",
usb/host/xhci-plat.c:187: .data = &xhci_plat_phytium_pe220x,
usb/host/xhci-plat.c:545: { "PHYT0039", (kernel_ulong_t)&xhci_plat_phytium_pe220x },
usb/phytium/Kconfig:8: be called phytium-usb.ko
usb/phytium/host.c:12:#define DRV_NAME "phytium_usb"
usb/phytium/host.c:61: uint8_t otgctrl = phytium_read8(&priv->regs->otgctrl);
usb/phytium/host.c:67: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:74: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:88: otgctrl = phytium_read8(&priv->regs->otgctrl);
usb/phytium/host.c:92: phytium_write8(&priv->regs->otgirq, OTGIRQ_CONIRQ);
usb/phytium/host.c:94: otgstate = phytium_read8(&priv->regs->otgstate);
usb/phytium/host.c:100: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX);
usb/phytium/host.c:101: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | ENDPRST_TOGRST | ENDPRST_IO_TX);
usb/phytium/host.c:102: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | ENDPRST_TOGRST);
usb/phytium/host.c:103: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO | 0 | 0x04);
usb/phytium/host.c:104: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO | FIFOCTRL_IO_TX | 0 | 0x04);
usb/phytium/host.c:117: phytium_write32(&priv->custom_regs->wakeup, 1);
usb/phytium/host.c:119: gen_cfg = phytium_read32(&priv->vhub_regs->gen_cfg);
usb/phytium/host.c:121: phytium_write32(&priv->vhub_regs->gen_cfg, gen_cfg);
usb/phytium/host.c:132: phytium_write8(&priv->regs->otgirq, OTGIRQ_IDLEIRQ);
usb/phytium/host.c:140: otgctrl = phytium_read8(&priv->regs->otgctrl);
usb/phytium/host.c:142: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:156: phytium_write8(&priv->regs->otgirq, OTGIRQ_IDLEIRQ);
usb/phytium/host.c:163: otgctrl = phytium_read8(&priv->regs->otgctrl);
usb/phytium/host.c:165: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:171: usbcs = phytium_read8(&priv->regs->usbcs);
usb/phytium/host.c:173: phytium_write8(&priv->regs->usbcs, usbcs);
usb/phytium/host.c:197: buf = phytium_read8(&priv->regs->ep[hwEp->hwEpNum - 1].txcon) & CON_BUF;
usb/phytium/host.c:201: otgstate = phytium_read8(&priv->regs->otgstate);
usb/phytium/host.c:207: val = phytium_read8(csReg);
usb/phytium/host.c:225: phytium_write32(&priv->custom_regs->wakeup, 0);
usb/phytium/host.c:227: gen_cfg = phytium_read32(&priv->vhub_regs->gen_cfg);
usb/phytium/host.c:229: phytium_write32(&priv->vhub_regs->gen_cfg, gen_cfg);
usb/phytium/host.c:232: phytium_write8(&priv->regs->otgirq, OTGIRQ_CONIRQ);
usb/phytium/host.c:251: switch (phytium_read8(&priv->regs->speedctrl)) {
usb/phytium/host.c:284: otgirq = phytium_read8(&priv->regs->otgirq);
usb/phytium/host.c:285: otgien = phytium_read8(&priv->regs->otgien);
usb/phytium/host.c:286: otgstatus = phytium_read8(&priv->regs->otgstatus);
usb/phytium/host.c:287: otgstate = phytium_read8(&priv->regs->otgstate);
usb/phytium/host.c:295: phytium_write8(&priv->regs->otgirq, OTGIRQ_BSE0SRPIRQ);
usb/phytium/host.c:297: otgctrl = phytium_read8(&priv->regs->otgctrl);
usb/phytium/host.c:299: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:304: phytium_write8(&priv->regs->otgirq, OTGIRQ_SRPDETIRQ);
usb/phytium/host.c:306: otgctrl = phytium_read8(&priv->regs->otgctrl);
usb/phytium/host.c:308: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:313: phytium_write8(&priv->regs->otgirq, OTGIRQ_VBUSERRIRQ);
usb/phytium/host.c:335: phytium_write8(&priv->regs->otgirq, OTGIRQ_IDLEIRQ);
usb/phytium/host.c:339: phytium_write8(&priv->regs->otgirq, OTGIRQ_IDLEIRQ);
usb/phytium/host.c:356: phytium_write8(&priv->regs->otgirq, OTGIRQ_CONIRQ);
usb/phytium/host.c:366: phytium_write8(&priv->regs->otgirq, OTGIRQ_IDCHANGEIRQ |
usb/phytium/host.c:379: txerrirq = phytium_read16(&priv->regs->txerrirq);
usb/phytium/host.c:380: txerrien = phytium_read16(&priv->regs->txerrien);
usb/phytium/host.c:383: rxerrirq = phytium_read16(&priv->regs->rxerrirq);
usb/phytium/host.c:384: rxerrien = phytium_read16(&priv->regs->rxerrien);
usb/phytium/host.c:392: phytium_write16(&priv->regs->rxerrirq, mask);
usb/phytium/host.c:394: phytium_write16(&priv->regs->rxerrien, rxerrien);
usb/phytium/host.c:399: phytium_write16(&priv->regs->txerrirq, mask);
usb/phytium/host.c:401: phytium_write16(&priv->regs->txerrien, txerrien);
usb/phytium/host.c:553: if (phytium_read8(&priv->regs->ep0cs) & 0x4) {
usb/phytium/host.c:554: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO |
usb/phytium/host.c:556: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO |
usb/phytium/host.c:571: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].txcon, regCon);
usb/phytium/host.c:576: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum |
usb/phytium/host.c:579: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum |
usb/phytium/host.c:582: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum |
usb/phytium/host.c:585: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum |
usb/phytium/host.c:590: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].txcon, regCon | CON_VAL);
usb/phytium/host.c:591: phytium_write16(&priv->regs->txmaxpack[hwEp->hwEpNum - 1],
usb/phytium/host.c:594: phytium_write8(&priv->regs->epExt[hwEp->hwEpNum - 1].txctrl,
usb/phytium/host.c:597: phytium_write8(&priv->regs->fnaddr, usbEpPriv->faddress);
usb/phytium/host.c:600: txsoftimer = phytium_read8(&priv->regs->txsoftimer[hwEp->hwEpNum].ctrl);
usb/phytium/host.c:602: phytium_write8(&priv->regs->txsoftimer[hwEp->hwEpNum].ctrl, txsoftimer);
usb/phytium/host.c:604: phytium_write16(&priv->regs->txsoftimer[hwEp->hwEpNum].timer,
usb/phytium/host.c:607: phytium_write8(&priv->regs->txsoftimer[hwEp->hwEpNum].ctrl, 0x83);
usb/phytium/host.c:609: phytium_write8(&priv->regs->fnaddr, usbEpPriv->faddress);
usb/phytium/host.c:610: phytium_write8(&priv->regs->ep0maxpack, usbEpPriv->maxPacketSize);
usb/phytium/host.c:611: phytium_write8(&priv->regs->ep0ctrl, usbEpPriv->epNum);
usb/phytium/host.c:614: ep0cs = phytium_read8(&priv->regs->ep0cs);
usb/phytium/host.c:616: phytium_write8(&priv->regs->ep0cs, ep0cs);
usb/phytium/host.c:620: phytium_write16(&priv->regs->txerrirq, 1 << hwEp->hwEpNum);
usb/phytium/host.c:621: txerrien = phytium_read16(&priv->regs->txerrien);
usb/phytium/host.c:623: phytium_write16(&priv->regs->txerrien, txerrien);
usb/phytium/host.c:627: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcon, regCon);
usb/phytium/host.c:634: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum);
usb/phytium/host.c:635: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum |
usb/phytium/host.c:638: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum);
usb/phytium/host.c:639: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum |
usb/phytium/host.c:645: phytium_write16(&priv->regs->rxmaxpack[hwEp->hwEpNum - 1],
usb/phytium/host.c:648: phytium_write8(&priv->regs->epExt[hwEp->hwEpNum - 1].rxctrl,
usb/phytium/host.c:651: phytium_write8(&priv->regs->fnaddr, usbEpPriv->faddress);
usb/phytium/host.c:653: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcs, 1);
usb/phytium/host.c:654: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcs, 1);
usb/phytium/host.c:655: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcs, 1);
usb/phytium/host.c:656: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcs, 1);
usb/phytium/host.c:658: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcon, regCon | CON_VAL);
usb/phytium/host.c:659: rxsoftimer = phytium_read8(&priv->regs->rxsoftimer[hwEp->hwEpNum].ctrl);
usb/phytium/host.c:661: phytium_write8(&priv->regs->rxsoftimer[hwEp->hwEpNum].ctrl, rxsoftimer);
usb/phytium/host.c:663: phytium_write16(&priv->regs->rxsoftimer[hwEp->hwEpNum].timer,
usb/phytium/host.c:666: phytium_write8(&priv->regs->rxsoftimer[hwEp->hwEpNum].ctrl, 0x83);
usb/phytium/host.c:668: phytium_write8(&priv->regs->fnaddr, usbEpPriv->faddress);
usb/phytium/host.c:669: phytium_write8(&priv->regs->ep0maxpack, usbEpPriv->maxPacketSize);
usb/phytium/host.c:670: phytium_write8(&priv->regs->ep0ctrl, usbEpPriv->epNum);
usb/phytium/host.c:674: phytium_write8(&priv->regs->ep0cs, EP0CS_HCSETTOGGLE);
usb/phytium/host.c:677: phytium_write16(&priv->regs->rxerrirq, 1 << hwEp->hwEpNum);
usb/phytium/host.c:678: rxerrien = phytium_read16(&priv->regs->rxerrien);
usb/phytium/host.c:680: phytium_write16(&priv->regs->rxerrien, rxerrien);
usb/phytium/host.c:690: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].txcon, 0x08);
usb/phytium/host.c:691: phytium_write16(&priv->regs->txerrien, txerrien);
usb/phytium/host.c:695: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcon, 0x08);
usb/phytium/host.c:696: phytium_write16(&priv->regs->rxerrien, rxerrien);
usb/phytium/host.c:836: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum);
usb/phytium/host.c:837: endprst = (phytium_read8(&priv->regs->endprst) & ENDPRST_TOGSETQ) ? 1 : 0;
usb/phytium/host.c:848: phytium_write8(&priv->regs->endprst, hwEp->hwEpNum | ENDPRST_IO_TX);
usb/phytium/host.c:849: endprst = (phytium_read8(&priv->regs->endprst) & ENDPRST_TOGSETQ) ? 1 : 0;
usb/phytium/host.c:920: usbError = isIn ? phytium_read8(&priv->regs->rx0err) : phytium_read8(&priv->regs->tx0err);
usb/phytium/host.c:931: phytium_write16(&priv->regs->rxerrirq, 1 << hwEp->hwEpNum);
usb/phytium/host.c:932: phytium_write16(&priv->regs->txerrirq, 1 << hwEp->hwEpNum);
usb/phytium/host.c:934: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO | 0 | 0x4);
usb/phytium/host.c:935: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO |
usb/phytium/host.c:1046: usbError = phytium_read8(&priv->regs->epExt[hwEpNum - 1].rxerr);
usb/phytium/host.c:1048: usbError = phytium_read8(&priv->regs->epExt[hwEpNum - 1].txerr);
usb/phytium/host.c:1055: phytium_write16(&priv->regs->rxerrirq, 1 << hwEpNum);
usb/phytium/host.c:1057: phytium_write16(&priv->regs->txerrirq, 1 << hwEpNum);
usb/phytium/host.c:1081: txcon = phytium_read8(&priv->regs->ep[hwEp->hwEpNum - 1].txcon);
usb/phytium/host.c:1083: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].txcon, txcon);
usb/phytium/host.c:1085: rxcon = phytium_read8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcon);
usb/phytium/host.c:1087: phytium_write8(&priv->regs->ep[hwEp->hwEpNum - 1].rxcon, rxcon);
usb/phytium/host.c:1140: struct phytium_cusb *config = *(struct phytium_cusb **)hcd->hcd_priv;
usb/phytium/host.c:1163:static void host_endpoint_update(struct phytium_cusb *config,
usb/phytium/host.c:1211: struct phytium_cusb *config = *(struct phytium_cusb **)hcd->hcd_priv;
usb/phytium/host.c:1307: struct phytium_cusb *config = *(struct phytium_cusb **)hcd->hcd_priv;
usb/phytium/host.c:1377: struct phytium_cusb *config;
usb/phytium/host.c:1386: config = *(struct phytium_cusb **)hcd->hcd_priv;
usb/phytium/host.c:1427: struct phytium_cusb *config;
usb/phytium/host.c:1433: config = *(struct phytium_cusb **)(hcd->hcd_priv);
usb/phytium/host.c:1463: struct phytium_cusb *config;
usb/phytium/host.c:1468: config = *(struct phytium_cusb **)hcd->hcd_priv;
usb/phytium/host.c:1492: struct phytium_cusb *config;
usb/phytium/host.c:1497: config = *(struct phytium_cusb **)(hcd->hcd_priv);
usb/phytium/host.c:1524: struct phytium_cusb *config = *(struct phytium_cusb **)hcd->hcd_priv;
usb/phytium/host.c:1545: struct phytium_cusb *config = *(struct phytium_cusb **)(hcd->hcd_priv);
usb/phytium/host.c:1560: struct phytium_cusb *config = *(struct phytium_cusb **)(hcd->hcd_priv);
usb/phytium/host.c:1578: struct phytium_cusb *config;
usb/phytium/host.c:1628: struct phytium_cusb *config;
usb/phytium/host.c:1700: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO | 0);
usb/phytium/host.c:1701: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO | FIFOCTRL_IO_TX | 0);
usb/phytium/host.c:1714: phytium_write16(&priv->regs->rxstaddr[epNum - 1].addr,
usb/phytium/host.c:1716: phytium_write8(&priv->regs->ep[epNum - 1].rxcon, 0x08);
usb/phytium/host.c:1717: phytium_write8(&priv->regs->fifoctrl, FIFOCTRL_FIFOAUTO | epNum);
usb/phytium/host.c:1718: phytium_write8(&priv->regs->irqmode[epNum - 1].inirqmode, 0x80);
usb/phytium/host.c:1733: phytium_write16(&priv->regs->txstaddr[epNum - 1].addr,
usb/phytium/host.c:1735: phytium_write8(&priv->regs->ep[epNum - 1].txcon, 0x08);
usb/phytium/host.c:1736: phytium_write8(&priv->regs->fifoctrl,
usb/phytium/host.c:1738: phytium_write8(&priv->regs->irqmode[epNum - 1].outirqmode, 0x80);
usb/phytium/host.c:1784: phytium_write8(&priv->regs->cpuctrl, BIT(1));
usb/phytium/host.c:1785: phytium_write8(&priv->regs->otgctrl, OTGCTRL_ABUSDROP);
usb/phytium/host.c:1786: phytium_write8(&priv->regs->ep0maxpack, 0x40);
usb/phytium/host.c:1789: phytium_write8(&priv->regs->otgien, 0x0);
usb/phytium/host.c:1790: phytium_write8(&priv->regs->usbien, 0x0);
usb/phytium/host.c:1791: phytium_write16(&priv->regs->txerrien, 0x0);
usb/phytium/host.c:1792: phytium_write16(&priv->regs->rxerrien, 0x0);
usb/phytium/host.c:1795: phytium_write8(&priv->regs->otgirq, 0xFE);
usb/phytium/host.c:1796: phytium_write8(&priv->regs->usbirq, 0xFF);
usb/phytium/host.c:1797: phytium_write16(&priv->regs->txerrirq, 0xFF);
usb/phytium/host.c:1798: phytium_write16(&priv->regs->rxerrirq, 0xFF);
usb/phytium/host.c:1800: phytium_write8(&priv->regs->tawaitbcon, 0x80);
usb/phytium/host.c:1806: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX);
usb/phytium/host.c:1807: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | ENDPRST_TOGRST | ENDPRST_IO_TX);
usb/phytium/host.c:1808: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | ENDPRST_TOGRST);
usb/phytium/host.c:1830: usbien = phytium_read8(&priv->regs->usbien);
usb/phytium/host.c:1832: phytium_write8(&priv->regs->usbien, usbien);
usb/phytium/host.c:1834: otgstate = phytium_read8(&priv->regs->otgstate);
usb/phytium/host.c:1839: phytium_write8(&priv->regs->otgirq, OTGIRQ_IDLEIRQ);
usb/phytium/host.c:1849: phytium_write8(&priv->regs->otgien, OTGIRQ_CONIRQ |
usb/phytium/host.c:1858: phytium_write8(&priv->regs->otgien, 0x0);
usb/phytium/host.c:1859: phytium_write8(&priv->regs->usbien, 0x0);
usb/phytium/host.c:1860: phytium_write16(&priv->regs->txerrien, 0x0);
usb/phytium/host.c:1861: phytium_write16(&priv->regs->rxerrien, 0x0);
usb/phytium/host.c:1863: phytium_write8(&priv->regs->otgirq, 0xFE);
usb/phytium/host.c:1864: phytium_write8(&priv->regs->usbirq, 0xFF);
usb/phytium/host.c:1865: phytium_write16(&priv->regs->txerrirq, 0xFF);
usb/phytium/host.c:1866: phytium_write16(&priv->regs->rxerrirq, 0xFF);
usb/phytium/host.c:1879: switch (phytium_read8(&priv->regs->speedctrl)) {
usb/phytium/host.c:1896: switch (phytium_read8(&priv->regs->otgstate)) {
usb/phytium/host.c:1916: usbirq = phytium_read8(&priv->regs->usbirq);
usb/phytium/host.c:1917: usbien = phytium_read8(&priv->regs->usbien);
usb/phytium/host.c:1928: phytium_write8(&priv->regs->usbirq, USBIR_URES);
usb/phytium/host.c:1934: phytium_write8(&priv->regs->usbirq, USBIR_SOF);
usb/phytium/host.c:1938: phytium_write8(&priv->regs->usbirq, USBIR_SUSP);
usb/phytium/host.c:1939: phytium_write8(&priv->regs->clkgate, 0x7);
usb/phytium/host.c:2097: rxcon = phytium_read8(&priv->regs->ep[hostEp->hwEpNum - 1].rxcon);
usb/phytium/host.c:2099: phytium_write8(&priv->regs->ep[hostEp->hwEpNum - 1].rxcon, rxcon);
usb/phytium/host.c:2103: txcon = phytium_read8(&priv->regs->ep[hostEp->hwEpNum - 1].txcon);
usb/phytium/host.c:2105: phytium_write8(&priv->regs->ep[hostEp->hwEpNum - 1].txcon, txcon);
usb/phytium/host.c:2186: otgctrl = phytium_read8(&priv->regs->otgctrl);
usb/phytium/host.c:2194: switch (phytium_read8(&priv->regs->otgstate)) {
usb/phytium/host.c:2205: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:2209: phytium_write8(&priv->regs->otgctrl, otgctrl);
usb/phytium/host.c:2223: phytium_write16(&priv->regs->txerrirq, 0xFFFF);
usb/phytium/host.c:2224: phytium_write16(&priv->regs->txirq, 0xFFFF);
usb/phytium/host.c:2225: phytium_write16(&priv->regs->rxerrirq, 0xFFFF);
usb/phytium/host.c:2226: phytium_write16(&priv->regs->rxirq, 0xFFFF);
usb/phytium/host.c:2228: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX);
usb/phytium/host.c:2229: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST |
usb/phytium/host.c:2231: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | ENDPRST_TOGRST);
usb/phytium/host.c:2232: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO | 0 | 0x04);
usb/phytium/host.c:2233: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO |
usb/phytium/host.c:2240: speed = phytium_read8(&priv->regs->speedctrl);
usb/phytium/host.c:2384: struct phytium_cusb *config = *(struct phytium_cusb **)hcd->hcd_priv;
usb/phytium/host.c:2484: .description = "phytium-hcd",
usb/phytium/host.c:2486: .hcd_priv_size = sizeof(struct phytium_cusb *),
usb/phytium/host.c:2510:static int phytium_host_set_default_cfg(struct phytium_cusb *config)
usb/phytium/host.c:2544:static int phytium_host_reinit(struct phytium_cusb *config)
usb/phytium/host.c:2564:int phytium_host_init(struct phytium_cusb *config)
usb/phytium/host.c:2571: phytium_host_set_default_cfg(config);
usb/phytium/host.c:2635:int phytium_host_uninit(struct phytium_cusb *config)
usb/phytium/host.c:2650:int phytium_host_resume(void *priv)
usb/phytium/host.c:2653: struct phytium_cusb *config = (struct phytium_cusb *)priv;
usb/phytium/host.c:2659: otgctrl = phytium_read8(&ctrl->regs->otgctrl);
usb/phytium/host.c:2661: phytium_write8(&ctrl->regs->otgctrl, otgctrl);
usb/phytium/host.c:2663: phytium_host_reinit(config);
usb/phytium/host.c:2668:int phytium_host_suspend(void *priv)
usb/phytium/host.c:2671: struct phytium_cusb *config = (struct phytium_cusb *)priv;
usb/phytium/host.c:2677: otgctrl = phytium_read8(&ctrl->regs->otgctrl);
usb/phytium/host.c:2679: phytium_write8(&ctrl->regs->otgctrl, otgctrl);
usb/phytium/pci.c:14:static bool phytium_hw_is_device(struct phytium_cusb *config)
usb/phytium/pci.c:21:static bool phytium_hw_is_host(struct phytium_cusb *config)
usb/phytium/pci.c:28:static int phytium_get_dr_mode(struct phytium_cusb *config)
usb/phytium/pci.c:37: if (phytium_hw_is_device(config)) {
usb/phytium/pci.c:44: } else if (phytium_hw_is_host(config)) {
usb/phytium/pci.c:66:static int phytium_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
usb/phytium/pci.c:68: struct phytium_cusb *config;
usb/phytium/pci.c:110: phytium_get_dr_mode(config);
usb/phytium/pci.c:112: phytium_core_reset(config, false);
usb/phytium/pci.c:115: phytium_host_init(config);
usb/phytium/pci.c:118: phytium_gadget_init(config);
usb/phytium/pci.c:125:static void phytium_pci_remove(struct pci_dev *pdev)
usb/phytium/pci.c:127: struct phytium_cusb *config = dev_get_drvdata(&pdev->dev);
usb/phytium/pci.c:129: phytium_get_dr_mode(config);
usb/phytium/pci.c:131: phytium_host_uninit(config);
usb/phytium/pci.c:134: phytium_gadget_uninit(config);
usb/phytium/pci.c:143:static void phytium_pci_shutdown(struct pci_dev *pdev)
usb/phytium/pci.c:145: struct phytium_cusb *config;
usb/phytium/pci.c:149: phytium_get_dr_mode(config);
usb/phytium/pci.c:156:static int phytium_pci_resume(struct pci_dev *pdev)
usb/phytium/pci.c:159: struct phytium_cusb *config;
usb/phytium/pci.c:165: ret = phytium_host_resume(config);
usb/phytium/pci.c:171:static int phytium_pci_suspend(struct pci_dev *pdev, pm_message_t state)
usb/phytium/pci.c:174: struct phytium_cusb *config;
usb/phytium/pci.c:180: ret = phytium_host_suspend(config);
usb/phytium/pci.c:187:const struct pci_device_id phytium_pci_id_table[] = {
usb/phytium/pci.c:192:static struct pci_driver phytium_otg_driver = {
usb/phytium/pci.c:193: .name = "phytium_usb",
usb/phytium/pci.c:194: .id_table = phytium_pci_id_table,
usb/phytium/pci.c:195: .probe = phytium_pci_probe,
usb/phytium/pci.c:196: .remove = phytium_pci_remove,
usb/phytium/pci.c:197: .shutdown = phytium_pci_shutdown,
usb/phytium/pci.c:199: .resume = phytium_pci_resume,
usb/phytium/pci.c:200: .suspend = phytium_pci_suspend,
usb/phytium/pci.c:204:module_pci_driver(phytium_otg_driver);
usb/phytium/pci.c:206:MODULE_AUTHOR("Chen Zhenhua <chenzhenhua@phytium.com.cn>");
usb/phytium/gadget.c:9:#define DRV_NAME "phytium_gadget"
usb/phytium/gadget.c:72:void gadget_giveback(struct phytium_ep *phy_ep, struct usb_request *usb_req, int status)
usb/phytium/gadget.c:74: struct phytium_request *phy_req;
usb/phytium/gadget.c:75: struct phytium_cusb *config;
usb/phytium/gadget.c:82: phy_req = usb_req ? container_of(usb_req, struct phytium_request, request) : NULL;
usb/phytium/gadget.c:120: struct phytium_ep *phy_ep;
usb/phytium/gadget.c:121: struct phytium_request *phy_req;
usb/phytium/gadget.c:188: struct phytium_cusb *config;
usb/phytium/gadget.c:198: config = container_of(gadget, struct phytium_cusb, gadget);
usb/phytium/gadget.c:210: gen_cfg = phytium_read32(&priv->phy_regs->gen_cfg);
usb/phytium/gadget.c:212: phytium_write32(&priv->phy_regs->gen_cfg, gen_cfg);
usb/phytium/gadget.c:220: struct phytium_cusb *config;
usb/phytium/gadget.c:228: config = container_of(gadget, struct phytium_cusb, gadget);
usb/phytium/gadget.c:232: gen_cfg = phytium_read32(&priv->phy_regs->gen_cfg);
usb/phytium/gadget.c:234: phytium_write32(&priv->phy_regs->gen_cfg, gen_cfg);
usb/phytium/gadget.c:243:static struct usb_gadget_ops phytium_gadget_ops = {
usb/phytium/gadget.c:255: struct phytium_ep *phy_ep = NULL;
usb/phytium/gadget.c:256: struct phytium_cusb *config;
usb/phytium/gadget.c:262: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:281: struct phytium_ep *phy_ep = NULL;
usb/phytium/gadget.c:282: struct phytium_cusb *config;
usb/phytium/gadget.c:290: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:307: struct phytium_ep *phy_ep;
usb/phytium/gadget.c:308: struct phytium_cusb *config;
usb/phytium/gadget.c:310: struct phytium_request *phy_request;
usb/phytium/gadget.c:322: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:340: struct phytium_ep *phy_ep;
usb/phytium/gadget.c:341: struct phytium_cusb *config;
usb/phytium/gadget.c:342: struct phytium_request *phy_request;
usb/phytium/gadget.c:348: phy_request = ls_req ? container_of(ls_req, struct phytium_request, request) : NULL;
usb/phytium/gadget.c:350: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:359: struct phytium_ep *phy_ep;
usb/phytium/gadget.c:360: struct phytium_cusb *config;
usb/phytium/gadget.c:361: struct phytium_request *phy_request;
usb/phytium/gadget.c:371: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:373: phy_request = ls_req ? container_of(ls_req, struct phytium_request, request) : NULL;
usb/phytium/gadget.c:418: struct phytium_ep *phy_ep;
usb/phytium/gadget.c:419: struct phytium_cusb *config;
usb/phytium/gadget.c:422: struct phytium_request *phy_request;
usb/phytium/gadget.c:423: struct phytium_request *phy_next_request;
usb/phytium/gadget.c:428: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:430: phy_request = ls_req ? container_of(ls_req, struct phytium_request, request) : NULL;
usb/phytium/gadget.c:457: struct phytium_ep *phy_ep;
usb/phytium/gadget.c:458: struct phytium_cusb *config;
usb/phytium/gadget.c:466: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:506: struct phytium_ep *phy_ep;
usb/phytium/gadget.c:507: struct phytium_request *phy_request;
usb/phytium/gadget.c:508: struct phytium_cusb *config;
usb/phytium/gadget.c:515: phy_ep = ls_ep ? container_of(ls_ep, struct phytium_ep, end_point) : NULL;
usb/phytium/gadget.c:517: phy_request = ls_req ? container_of(ls_req, struct phytium_request, request) : NULL;
usb/phytium/gadget.c:602: buf = phytium_read8(&priv->regs->ep[epNum - 1].txcon) & CON_BUF;
usb/phytium/gadget.c:605: txcs = phytium_read8(&priv->regs->ep[epNum - 1].txcs);
usb/phytium/gadget.c:711: txcon = phytium_read8(&priv->regs->ep[epNum - 1].txcon);
usb/phytium/gadget.c:713: phytium_write8(&priv->regs->ep[epNum - 1].txcon, txcon | CON_STALL);
usb/phytium/gadget.c:714: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX | epNum);
usb/phytium/gadget.c:715: phytium_write8(&priv->regs->endprst,
usb/phytium/gadget.c:719: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX | epNum);
usb/phytium/gadget.c:720: phytium_write8(&priv->regs->endprst,
usb/phytium/gadget.c:722: phytium_write8(&priv->regs->ep[epNum - 1].txcon, txcon & (~CON_STALL));
usb/phytium/gadget.c:725: rxcon = phytium_read8(&priv->regs->ep[epNum - 1].rxcon);
usb/phytium/gadget.c:727: phytium_write8(&priv->regs->ep[epNum - 1].rxcon, rxcon | CON_STALL);
usb/phytium/gadget.c:728: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX | epNum);
usb/phytium/gadget.c:729: phytium_write8(&priv->regs->endprst, epNum | ENDPRST_FIFORST);
usb/phytium/gadget.c:731: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX | epNum);
usb/phytium/gadget.c:732: phytium_write8(&priv->regs->endprst,
usb/phytium/gadget.c:734: phytium_write8(&priv->regs->ep[epNum - 1].rxcon, rxcon & (~CON_STALL));
usb/phytium/gadget.c:801: speedctrl = phytium_read8(&priv->regs->speedctrl) & (~SPEEDCTRL_HSDISABLE);
usb/phytium/gadget.c:946: txcon = phytium_read8(&priv->regs->ep[epNum - 1].txcon);
usb/phytium/gadget.c:949: rxcon = phytium_read8(&priv->regs->ep[epNum - 1].rxcon);
usb/phytium/gadget.c:977: phytium_write8(&priv->regs->ep0cs, EP0CS_CHGSET);
usb/phytium/gadget.c:980: ((char *)setup)[i] = phytium_read8(&priv->regs->setupdat[i]);
usb/phytium/gadget.c:982: ep0cs = phytium_read8(&priv->regs->ep0cs);
usb/phytium/gadget.c:988: phytium_write8(&priv->regs->usbirq, USBIR_SUDAV);
usb/phytium/gadget.c:1050: phytium_write8(&priv->regs->ep0cs, EP0CS_HSNAK);
usb/phytium/gadget.c:1063: phytium_write8(&priv->regs->ep0Rxbc, 0);
usb/phytium/gadget.c:1090: ep0cs = phytium_read8(&priv->regs->ep0cs);
usb/phytium/gadget.c:1092: phytium_write8(&priv->regs->ep0cs, ep0cs);
usb/phytium/gadget.c:1096: phytium_write8(&priv->regs->ep0cs, EP0CS_HSNAK);
usb/phytium/gadget.c:1179: phytium_write8(&priv->regs->ep0cs, EP0CS_HSNAK);
usb/phytium/gadget.c:1189: phytium_write8(&priv->regs->ep0cs, EP0CS_HSNAK);
usb/phytium/gadget.c:1204: usbcs = phytium_read8(&priv->regs->usbcs);
usb/phytium/gadget.c:1206: phytium_write8(&priv->regs->usbcs, usbcs);
usb/phytium/gadget.c:1356: rxien = phytium_read16(&priv->regs->rxien);
usb/phytium/gadget.c:1358: phytium_write16(&priv->regs->rxien, rxien);
usb/phytium/gadget.c:1359: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_IO_TX | FIFOCTRL_FIFOAUTO);
usb/phytium/gadget.c:1361: txien = phytium_read16(&priv->regs->txien);
usb/phytium/gadget.c:1363: phytium_write16(&priv->regs->txien, txien);
usb/phytium/gadget.c:1364: phytium_write8(&priv->regs->ep0fifoctrl, FIFOCTRL_FIFOAUTO);
usb/phytium/gadget.c:1371: phytium_write8(&priv->regs->ep0maxpack, 0x40);
usb/phytium/gadget.c:1438: phytium_write16(&priv->regs->txmaxpack[epNum - 1], payload);
usb/phytium/gadget.c:1439: phytium_write8(&priv->regs->ep[epNum - 1].txcon, CON_VAL | type
usb/phytium/gadget.c:1442: phytium_write8(&priv->regs->fifoctrl, FIFOCTRL_FIFOAUTO | FIFOCTRL_IO_TX | epNum);
usb/phytium/gadget.c:1443: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX | epNum);
usb/phytium/gadget.c:1444: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX | epNum |
usb/phytium/gadget.c:1457: phytium_write16(&priv->regs->rxmaxpack[epNum - 1], payload);
usb/phytium/gadget.c:1458: phytium_write8(&priv->regs->ep[epNum - 1].rxcon, CON_VAL | type
usb/phytium/gadget.c:1461: phytium_write8(&priv->regs->fifoctrl, FIFOCTRL_FIFOAUTO | epNum);
usb/phytium/gadget.c:1462: phytium_write8(&priv->regs->endprst, epNum);
usb/phytium/gadget.c:1463: phytium_write8(&priv->regs->endprst, epNum | ENDPRST_FIFORST | ENDPRST_TOGRST);
usb/phytium/gadget.c:1472: phytium_write16(&priv->regs->isoautodump, 1 << epNum);
usb/phytium/gadget.c:1473: phytium_write16(&priv->regs->isodctrl, 1 << epNum);
usb/phytium/gadget.c:1511: txcon = phytium_read8(&priv->regs->ep[gadgetEp->hwEpNum - 1].txcon);
usb/phytium/gadget.c:1513: phytium_write8(&priv->regs->ep[gadgetEp->hwEpNum - 1].txcon, txcon);
usb/phytium/gadget.c:1515: rxcon = phytium_read8(&priv->regs->ep[gadgetEp->hwEpNum - 1].rxcon);
usb/phytium/gadget.c:1517: phytium_write8(&priv->regs->ep[gadgetEp->hwEpNum - 1].rxcon, rxcon);
usb/phytium/gadget.c:1583: if (!(phytium_read8(&priv->regs->ep[gadgetEp->hwEpNum - 1].txcon)
usb/phytium/gadget.c:1589: if (!(phytium_read8(&priv->regs->ep[gadgetEp->hwEpNum - 1].rxcon)
usb/phytium/gadget.c:1652: phytium_write8(&priv->regs->ep0cs, EP0CS_HSNAK);
usb/phytium/gadget.c:1862: phytium_write16(&priv->regs->txstaddr[num - 1].addr,
usb/phytium/gadget.c:1864: phytium_write8(&priv->regs->ep[num - 1].txcon, 0);
usb/phytium/gadget.c:1868: phytium_write16(&priv->regs->rxstaddr[num - 1].addr,
usb/phytium/gadget.c:1870: phytium_write8(&priv->regs->ep[num - 1].rxcon, 0);
usb/phytium/gadget.c:1906: phytium_write8(&priv->regs->ep0maxpack, 0x40);
usb/phytium/gadget.c:1907: phytium_write16(&priv->regs->rxien, 0);
usb/phytium/gadget.c:1908: phytium_write16(&priv->regs->txien, 0);
usb/phytium/gadget.c:1909: phytium_write16(&priv->regs->rxirq, 0xFFFF);
usb/phytium/gadget.c:1910: phytium_write16(&priv->regs->txirq, 0xFFFF);
usb/phytium/gadget.c:1911: phytium_write8(&priv->regs->usbirq, 0xEF);
usb/phytium/gadget.c:1912: phytium_write8(&priv->regs->endprst, ENDPRST_IO_TX);
usb/phytium/gadget.c:1913: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | ENDPRST_TOGRST | ENDPRST_IO_TX);
usb/phytium/gadget.c:1914: phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | ENDPRST_TOGRST);
usb/phytium/gadget.c:1947: usbcs = phytium_read8(&priv->regs->usbcs);
usb/phytium/gadget.c:1949: phytium_write8(&priv->regs->usbcs, usbcs);
usb/phytium/gadget.c:1953: usbcs = phytium_read8(&priv->regs->usbcs);
usb/phytium/gadget.c:1955: phytium_write8(&priv->regs->usbcs, usbcs);
usb/phytium/gadget.c:1970: phytium_write8(&priv->regs->usbcs, USBCS_DISCON);
usb/phytium/gadget.c:1983: usbien = phytium_read8(&priv->regs->usbien);
usb/phytium/gadget.c:1985: phytium_write8(&priv->regs->usbien, usbien);
usb/phytium/gadget.c:1987: usbcs = phytium_read8(&priv->regs->usbcs);
usb/phytium/gadget.c:1989: phytium_write8(&priv->regs->usbcs, usbcs);
usb/phytium/gadget.c:2033: phytium_write8(&priv->regs->usbien, 0);
usb/phytium/gadget.c:2046: usbirq = phytium_read8(&priv->regs->usbirq);
usb/phytium/gadget.c:2047: usbien = phytium_read8(&priv->regs->usbien);
usb/phytium/gadget.c:2058: usbcs = phytium_read8(&priv->regs->usbcs);
usb/phytium/gadget.c:2060: phytium_write8(&priv->regs->usbcs, usbcs);
usb/phytium/gadget.c:2061: phytium_write8(&priv->regs->usbirq, USBIR_LPMIR);
usb/phytium/gadget.c:2066: phytium_write8(&priv->regs->usbirq, USBIR_URES);
usb/phytium/gadget.c:2077: phytium_write8(&priv->regs->usbirq, USBIR_HSPEED);
usb/phytium/gadget.c:2089: phytium_write8(&priv->regs->usbirq, USBIR_SOF);
usb/phytium/gadget.c:2094: phytium_write8(&priv->regs->usbirq, USBIR_SUTOK);
usb/phytium/gadget.c:2099: phytium_write8(&priv->regs->usbirq, USBIR_SUSP);
usb/phytium/gadget.c:2120: *numOfFrame = phytium_read16(&priv->regs->frmnr);
usb/phytium/gadget.c:2211:static int phytium_gadget_set_default_cfg(struct phytium_cusb *config)
usb/phytium/gadget.c:2256: struct phytium_cusb *config;
usb/phytium/gadget.c:2306:static void init_peripheral_ep(struct phytium_cusb *config,
usb/phytium/gadget.c:2307: struct phytium_ep *phy_ep, struct GADGET_EP *gadget_ep, int is_tx)
usb/phytium/gadget.c:2366:static void gadget_init_endpoint(struct phytium_cusb *config)
usb/phytium/gadget.c:2390:static int gadget_setup(struct phytium_cusb *config)
usb/phytium/gadget.c:2395: config->gadget.ops = &phytium_gadget_ops;
usb/phytium/gadget.c:2398: config->gadget.name = "phytium_gadget";
usb/phytium/gadget.c:2415:int phytium_gadget_reinit(struct phytium_cusb *config)
usb/phytium/gadget.c:2434:int phytium_gadget_init(struct phytium_cusb *config)
usb/phytium/gadget.c:2441: phytium_gadget_set_default_cfg(config);
usb/phytium/gadget.c:2495:int phytium_gadget_uninit(struct phytium_cusb *config)
usb/phytium/gadget.c:2504:int phytium_gadget_resume(void *priv)
usb/phytium/gadget.c:2509: struct phytium_cusb *config = (struct phytium_cusb *)priv;
usb/phytium/gadget.c:2519: phytium_gadget_reinit(config);
usb/phytium/gadget.c:2524: gen_cfg = phytium_read32(&ctrl->phy_regs->gen_cfg);
usb/phytium/gadget.c:2526: phytium_write32(&ctrl->phy_regs->gen_cfg, gen_cfg);
usb/phytium/gadget.c:2534:int phytium_gadget_suspend(void *priv)
usb/phytium/core.c:5:int phytium_core_reset(struct phytium_cusb *config, bool skip_wait)
usb/phytium/core.c:15:uint32_t phytium_read32(uint32_t *address)
usb/phytium/core.c:20:void phytium_write32(uint32_t *address, uint32_t value)
usb/phytium/core.c:25:uint16_t phytium_read16(uint16_t *address)
usb/phytium/core.c:30:void phytium_write16(uint16_t *address, uint16_t value)
usb/phytium/core.c:35:uint8_t phytium_read8(uint8_t *address)
usb/phytium/core.c:40:void phytium_write8(uint8_t *address, uint8_t value)
usb/phytium/platform.c:18:static const struct of_device_id phytium_otg_of_match[] = {
usb/phytium/platform.c:20: .compatible = "phytium,usb2",
usb/phytium/platform.c:26:static const struct acpi_device_id phytium_otg_acpi_match[] = {
usb/phytium/platform.c:32:static int phytium_get_dr_mode(struct phytium_cusb *config)
usb/phytium/platform.c:46: struct phytium_cusb *config = (struct phytium_cusb *)dev_id;
usb/phytium/platform.c:52: otgstate = phytium_read8(&host_ctrl->regs->otgstate);
usb/phytium/platform.c:54: otgstate = phytium_read8(&gadget_ctrl->regs->otgstate);
usb/phytium/platform.c:67:static int phytium_driver_probe(struct platform_device *pdev)
usb/phytium/platform.c:69: struct phytium_cusb *config;
usb/phytium/platform.c:101: phytium_get_dr_mode(config);
usb/phytium/platform.c:103: phytium_core_reset(config, false);
usb/phytium/platform.c:110: phytium_host_init(config);
usb/phytium/platform.c:115: phytium_gadget_init(config);
usb/phytium/platform.c:121: IRQF_SHARED, "phytium_otg", config);
usb/phytium/platform.c:131:static int phytium_driver_remove(struct platform_device *dev)
usb/phytium/platform.c:133: struct phytium_cusb *config = platform_get_drvdata(dev);
usb/phytium/platform.c:138: phytium_get_dr_mode(config);
usb/phytium/platform.c:142: phytium_host_uninit(config);
usb/phytium/platform.c:146: phytium_gadget_uninit(config);
usb/phytium/platform.c:152:static void phytium_driver_shutdown(struct platform_device *dev)
usb/phytium/platform.c:158:static int phytium_driver_suspend(struct device *dev)
usb/phytium/platform.c:160: struct phytium_cusb *config;
usb/phytium/platform.c:167: ret = phytium_host_suspend(config);
usb/phytium/platform.c:171: ret = phytium_gadget_suspend(config);
usb/phytium/platform.c:176:static int phytium_driver_resume(struct device *dev)
usb/phytium/platform.c:178: struct phytium_cusb *config;
usb/phytium/platform.c:184: ret = phytium_host_resume(config);
usb/phytium/platform.c:188: ret = phytium_gadget_resume(config);
usb/phytium/platform.c:193:static const struct dev_pm_ops phytium_usb_pm_ops = {
usb/phytium/platform.c:194: SET_SYSTEM_SLEEP_PM_OPS(phytium_driver_suspend, phytium_driver_resume)
usb/phytium/platform.c:198:static struct platform_driver phytium_otg_driver = {
usb/phytium/platform.c:200: .name = "phytium-otg",
usb/phytium/platform.c:201: .of_match_table = of_match_ptr(phytium_otg_of_match),
usb/phytium/platform.c:202: .acpi_match_table = ACPI_PTR(phytium_otg_acpi_match),
usb/phytium/platform.c:204: .pm = &phytium_usb_pm_ops,
usb/phytium/platform.c:207: .probe = phytium_driver_probe,
usb/phytium/platform.c:208: .remove = phytium_driver_remove,
usb/phytium/platform.c:209: .shutdown = phytium_driver_shutdown,
usb/phytium/platform.c:212:module_platform_driver(phytium_otg_driver);
usb/phytium/platform.c:214:MODULE_AUTHOR("Chen Zhenhua <chenzhenhua@phytium.com.cn>");
usb/phytium/dma.c:51:static int32_t phytium_dma_probe(struct DMA_CFG *config, struct DMA_SYSREQ *sysReq)
usb/phytium/dma.c:62:static int32_t phytium_dma_init(struct DMA_CONTROLLER *priv,
usb/phytium/dma.c:84:static void phytium_dma_destroy(struct DMA_CONTROLLER *priv)
usb/phytium/dma.c:89:static int32_t phytium_dma_start(struct DMA_CONTROLLER *priv)
usb/phytium/dma.c:99: phytium_write32(&priv->regs->conf, DMARF_DMULT);
usb/phytium/dma.c:102: phytium_write32(&priv->regs->conf, DMARF_DSING);
usb/phytium/dma.c:132:static uint32_t phytium_dma_stop(struct DMA_CONTROLLER *priv)
usb/phytium/dma.c:172: ep_sel = phytium_read32(&priv->regs->ep_sel);
usb/phytium/dma.c:208: phytium_write32(&priv->regs->ep_sel, ep_sel);
usb/phytium/dma.c:213:static void phytium_dma_isr(struct DMA_CONTROLLER *priv)
usb/phytium/dma.c:224: ep_ists = phytium_read32(&priv->regs->ep_ists);
usb/phytium/dma.c:226: phytium_write32(&priv->regs->ep_sts, DMARF_EP_IOC |
usb/phytium/dma.c:237: phytium_write32(&priv->regs->ep_sel, epNum | isDirTx);
usb/phytium/dma.c:244: ep_sts = phytium_read32(&priv->regs->ep_sts);
usb/phytium/dma.c:247: phytium_write32(&priv->regs->ep_sts, DMARF_EP_TRBERR);
usb/phytium/dma.c:252: phytium_write32(&priv->regs->ep_sts, DMARF_EP_IOC | DMARF_EP_ISP);
usb/phytium/dma.c:258: phytium_write32(&priv->regs->ep_sts, DMARF_EP_TRBERR);
usb/phytium/dma.c:259: ep_cfg = phytium_read32(&priv->regs->ep_cfg);
usb/phytium/dma.c:261: phytium_write32(&priv->regs->ep_cfg, (uint32_t)ep_cfg);
usb/phytium/dma.c:274: phytium_write32(&priv->regs->ep_sts, DMARF_EP_OUTSMM);
usb/phytium/dma.c:277: phytium_write32(&priv->regs->ep_sts, DMARF_EP_DESCMIS);
usb/phytium/dma.c:280: phytium_write32(&priv->regs->ep_sts, DMARF_EP_ISOERR);
usb/phytium/dma.c:288:static void phytium_dma_errIsr(struct DMA_CONTROLLER *priv, uint8_t irqNr, uint8_t isDirTx)
usb/phytium/dma.c:314:static void *phytium_dma_channelAlloc(struct DMA_CONTROLLER *priv,
usb/phytium/dma.c:329: ep_ien = phytium_read32(&priv->regs->ep_ien);
usb/phytium/dma.c:360: phytium_write32(&priv->regs->ep_sel, (uint32_t)hwEpNum | channel->isDirTx);
usb/phytium/dma.c:361: ep_cfg = phytium_read32(&priv->regs->ep_cfg);
usb/phytium/dma.c:370: phytium_write32(&priv->regs->ep_sts, DMARF_EP_IOC | DMARF_EP_ISP | DMARF_EP_TRBERR);
usb/phytium/dma.c:371: phytium_write32(&priv->regs->ep_cfg, (uint32_t)DMARV_EP_ENABLED | ep_cfg);
usb/phytium/dma.c:372: phytium_write32(&priv->regs->ep_ien, ep_ien);
usb/phytium/dma.c:373: phytium_write32(&priv->regs->ep_sts_en, DMARF_EP_TRBERR);
usb/phytium/dma.c:378:static int32_t phytium_dma_channelRelease(struct DMA_CONTROLLER *priv, struct DMA_Channel *channel)
usb/phytium/dma.c:386: ep_ien = phytium_read32(&priv->regs->ep_ien);
usb/phytium/dma.c:392: phytium_write32(&priv->regs->ep_sel, (uint32_t)channel->hwUsbEppNum | channel->isDirTx);
usb/phytium/dma.c:393: phytium_write32(&priv->regs->ep_cfg, (uint32_t)0);
usb/phytium/dma.c:394: phytium_write32(&priv->regs->ep_ien, ep_ien);
usb/phytium/dma.c:395: phytium_write32(&priv->regs->ep_sts_en, 0x0);
usb/phytium/dma.c:396: phytium_write32(&priv->regs->ep_cmd, DMARF_EP_EPRST);
usb/phytium/dma.c:397: phytium_write32(&priv->regs->ep_sts, DMARF_EP_IOC | DMARF_EP_ISP |
usb/phytium/dma.c:443:static uint32_t phytium_dma_NewTd(struct DMA_CONTROLLER *priv,
usb/phytium/dma.c:501:static void phytium_dma_ArmTd(struct DMA_CONTROLLER *priv, struct DMA_TrbChainDesc *trbChainDesc)
usb/phytium/dma.c:512: phytium_write32(&priv->regs->ep_sel, (channel->isDirTx | channel->hwUsbEppNum));
usb/phytium/dma.c:514: ep_sts = phytium_read32(&priv->regs->ep_sts);
usb/phytium/dma.c:517: phytium_write32(&priv->regs->ep_sts, DMARF_EP_TRBERR);
usb/phytium/dma.c:518: phytium_write32(&priv->regs->traddr, trbChainDesc->trbDMAAddr);
usb/phytium/dma.c:519: phytium_write32(&priv->regs->ep_sts, DMARF_EP_TRBERR);
usb/phytium/dma.c:521: ep_cfg = phytium_read32(&priv->regs->ep_cfg);
usb/phytium/dma.c:522: phytium_write32(&priv->regs->ep_cmd, DMARF_EP_DRDY);
usb/phytium/dma.c:525: phytium_write32(&priv->regs->ep_cfg, ep_cfg);
usb/phytium/dma.c:533: ep_cmd = phytium_read32(&priv->regs->ep_cmd);
usb/phytium/dma.c:535: phytium_write32(&priv->regs->traddr, trbChainDesc->trbDMAAddr);
usb/phytium/dma.c:536: phytium_write32(&priv->regs->ep_cmd, DMARF_EP_DRDY);
usb/phytium/dma.c:543:static int32_t phytium_dma_TrbChainAlloc(struct DMA_CONTROLLER *priv,
usb/phytium/dma.c:608:static int32_t phytium_dma_channelProgram(struct DMA_CONTROLLER *priv,
usb/phytium/dma.c:625: retval = phytium_dma_TrbChainAlloc(priv, channel, numOfTrbs, &trbChainDesc);
usb/phytium/dma.c:634: phytium_dma_NewTd(priv, trbChainDesc);
usb/phytium/dma.c:636: phytium_dma_ArmTd(priv, trbChainDesc);
usb/phytium/dma.c:643:static enum DMA_Status phytium_dma_getChannelStatus(struct DMA_CONTROLLER *priv,
usb/phytium/dma.c:652: phytium_write32(&priv->regs->ep_sel, channel->isDirTx | channel->hwUsbEppNum);
usb/phytium/dma.c:653: ep_cmd = phytium_read32(&priv->regs->ep_cmd);
usb/phytium/dma.c:654: ep_sts = phytium_read32(&priv->regs->ep_sts);
usb/phytium/dma.c:665:static int32_t phytium_dma_channelAbort(struct DMA_CONTROLLER *priv, struct DMA_Channel *channel)
usb/phytium/dma.c:673: if (phytium_dma_getChannelStatus(priv, channel) >= DMA_STATUS_BUSY)
usb/phytium/dma.c:674: phytium_write32(&priv->regs->conf, DMARF_RESET);
usb/phytium/dma.c:676: phytium_write32(&priv->regs->ep_sel, (uint32_t)(channel->isDirTx | channel->hwUsbEppNum));
usb/phytium/dma.c:677: ep_cfg = phytium_read32(&priv->regs->ep_cfg);
usb/phytium/dma.c:679: phytium_write32(&priv->regs->ep_cfg, ep_cfg);
usb/phytium/dma.c:680: phytium_write32(&priv->regs->ep_sts, 0xFFFFFFFF);
usb/phytium/dma.c:701:static int32_t phytium_dma_getActualLength(struct DMA_CONTROLLER *priv, struct DMA_Channel *channel)
usb/phytium/dma.c:709:static int32_t phytium_dma_getMaxLength(struct DMA_CONTROLLER *priv, struct DMA_Channel *channel)
usb/phytium/dma.c:717:static int32_t phytium_dma_setMaxLength(struct DMA_CONTROLLER *priv,
usb/phytium/dma.c:732:static void phytium_dma_setParentPriv(struct DMA_CONTROLLER *priv, void *parent)
usb/phytium/dma.c:740:void phytium_dma_controllerReset(struct DMA_CONTROLLER *priv)
usb/phytium/dma.c:747: conf = phytium_read32(&priv->regs->conf);
usb/phytium/dma.c:749: phytium_write32(&priv->regs->conf, conf);
usb/phytium/dma.c:754:void phytium_dma_setHostMode(struct DMA_CONTROLLER *priv)
usb/phytium/dma.c:762:struct DMA_OBJ phytium_dma_Drv = {
usb/phytium/dma.c:763: .dma_probe = phytium_dma_probe,
usb/phytium/dma.c:764: .dma_init = phytium_dma_init,
usb/phytium/dma.c:765: .dma_destroy = phytium_dma_destroy,
usb/phytium/dma.c:766: .dma_start = phytium_dma_start,
usb/phytium/dma.c:767: .dma_stop = phytium_dma_stop,
usb/phytium/dma.c:768: .dma_isr = phytium_dma_isr,
usb/phytium/dma.c:769: .dma_errIsr = phytium_dma_errIsr,
usb/phytium/dma.c:770: .dma_channelAlloc = phytium_dma_channelAlloc,
usb/phytium/dma.c:771: .dma_channelRelease = phytium_dma_channelRelease,
usb/phytium/dma.c:772: .dma_channelProgram = phytium_dma_channelProgram,
usb/phytium/dma.c:773: .dma_channelAbort = phytium_dma_channelAbort,
usb/phytium/dma.c:774: .dma_getChannelStatus = phytium_dma_getChannelStatus,
usb/phytium/dma.c:775: .dma_getActualLength = phytium_dma_getActualLength,
usb/phytium/dma.c:776: .dma_getMaxLength = phytium_dma_getMaxLength,
usb/phytium/dma.c:777: .dma_setMaxLength = phytium_dma_setMaxLength,
usb/phytium/dma.c:778: .dma_setParentPriv = phytium_dma_setParentPriv,
usb/phytium/dma.c:779: .dma_controllerReset = phytium_dma_controllerReset,
usb/phytium/dma.c:780: .dma_setHostMode = phytium_dma_setHostMode,
usb/phytium/dma.c:785: return &phytium_dma_Drv;
usb/phytium/core.h:13:struct phytium_ep {
usb/phytium/core.h:14: struct phytium_cusb *config;
usb/phytium/core.h:26:struct phytium_request {
usb/phytium/core.h:30: struct phytium_ep *ep;
usb/phytium/core.h:31: struct phytium_cusb *config;
usb/phytium/core.h:36:struct phytium_cusb {
usb/phytium/core.h:53: struct phytium_ep endpoints_tx[MAX_EPS_CHANNELS];
usb/phytium/core.h:54: struct phytium_ep endpoints_rx[MAX_EPS_CHANNELS];
usb/phytium/core.h:71:int phytium_core_reset(struct phytium_cusb *config, bool skip_wait);
usb/phytium/core.h:73:int phytium_host_init(struct phytium_cusb *config);
usb/phytium/core.h:74:int phytium_host_uninit(struct phytium_cusb *config);
usb/phytium/core.h:77:int phytium_host_resume(void *priv);
usb/phytium/core.h:78:int phytium_host_suspend(void *priv);
usb/phytium/core.h:79:int phytium_gadget_resume(void *priv);
usb/phytium/core.h:80:int phytium_gadget_suspend(void *priv);
usb/phytium/core.h:83:int phytium_gadget_init(struct phytium_cusb *config);
usb/phytium/core.h:84:int phytium_gadget_uninit(struct phytium_cusb *config);
usb/phytium/core.h:86:uint32_t phytium_read32(uint32_t *address);
usb/phytium/core.h:88:void phytium_write32(uint32_t *address, uint32_t value);
usb/phytium/core.h:90:uint16_t phytium_read16(uint16_t *address);
usb/phytium/core.h:92:void phytium_write16(uint16_t *address, uint16_t value);
usb/phytium/core.h:94:uint8_t phytium_read8(uint8_t *address);
usb/phytium/core.h:96:void phytium_write8(uint8_t *address, uint8_t value);
usb/phytium/Makefile:3:obj-$(CONFIG_USB_PHYTIUM) += phytium-usb.o
usb/phytium/Makefile:5:phytium-usb-y := core.o dma.o platform.o host.o gadget.o
usb/Kconfig:128:source "drivers/usb/phytium/Kconfig"
usb/Makefile:70:obj-$(CONFIG_USB_PHYTIUM) += phytium/