Bottom-fill process for flip-chip applications

Flip chip (FC) technology is a packaging method in which the chip is directly attached to the substrate, which has the advantages of high density, high performance and low cost. However, due to the coefficient of thermal expansion (CTE) mismatch between the chip and the substrate, the solder joints are subjected to large thermal stresses when the temperature changes, leading to fatigue damage and failure. To improve the reliability of solder joints, a common method is to inject a polymer material, called underfill, between the chip and the substrate. Underfill improves the stress distribution in the solder joint, reduces the strain amplitude in the solder joint, and extends the thermal fatigue life of the solder joint.

Figure 1. Underfill process

Underfill is a liquid encapsulant, typically an epoxy resin heavily filled with SiO2, that is used between the chip and the substrate after flip chip interconnections. After curing, the hardened underfill has a high modulus, low CTE to match the solder joints, low moisture absorption, and good adhesion to the chip and substrate. Thermal stresses on the solder joints are redistributed between the chip, underfill, substrate and all solder joints, rather than being concentrated on the peripheral solder joints. The application of underfill has been proven to reduce the most important solder joint strain levels to 0.10-0.25 of the strain of an unencapsulated solder joint. as a result, underfill can increase the fatigue life of solder joints by a factor of 10 to 100. In addition, it protects the solder joints from environmental attack. Underfill is a practical solution for expanding the use of flip chip technology from ceramic to organic substrates and from high-end to cost-sensitive products.

Figure 2. Flip Chip Process with Underfill

Advances in flip chip technology have led to the development of underfill processes and underfill materials. Figure 2 illustrates the process steps of a flip chip using the underfill process. Separate flux dispensing and cleaning steps are required before and after the chip is assembled. After the chip is assembled on the substrate, the unfilled material is dispensed and dragged into the gap between the chip and the substrate.

Foreign material control before underfill application

Bottom filler adhesive before sizing need to confirm that the board and filler surface without foreign objects and a large number of flux residue, more flux residue will lead to adhesive attached to the flux residue, subsequent use of the process of flux residue volatilization, softening, mutation directly affect the mechanical properties of the adhesive, which affects the reliability of the product. The standard bottom filling sizing process requires PCBA cleaning and drying, and then dispensing curing.

The advantages of the bottom filling process are:

  1. Improve the reliability of the solder joints to extend the service life of the product;

  2. Protect the solder joints from environmental erosion, improve product corrosion resistance;

  3. Reduce the thermal stress between the chip and the substrate, improve the product's resistance to thermal cycling;

  4. Enhance the adhesion between the chip and the substrate to improve the impact resistance and vibration resistance of the product.

Disadvantages of the bottom filling process:

  1. Increase the cost and complexity of packaging, requiring additional equipment and materials;

  2. Need to select appropriate bottom-filling materials and parameters to match the characteristics of the chip and substrate to avoid failure modes such as residual stress, cracks, corrosion and voids;

  3. Difficult to repair or rework the package, requiring the removal of the bottom filler in order to inspect or replace the solder joints;

  4. may affect the electrical properties of the chip, such as signal delay, crosstalk, noise, etc..

Translated with DeepL.com (free version)

相关推荐
裕工实验室3 天前
高速射频 PCB 信号完整性优化:从电源回路到地平面设计全解析
硬件工程·pcb工艺·材料工程
三佛科技-134163842124 天前
SM7055-18 输出18V 250mA低成本非隔离BUCK、 BUCK-BOOST方案典型应用电路(电磁炉方案)
单片机·嵌入式硬件·物联网·智能家居·pcb工艺
线束线缆组件品替网6 天前
Aries Electronics 定制线缆选型与设计建议
数码相机·测试工具·智能手机·电脑·pcb工艺
可可南木8 天前
ICT测试日志 --5--日志记录的格式 下
功能测试·测试工具·pcb工艺
可可南木10 天前
ICT测试日志 --4--日志记录的格式 中
功能测试·测试工具·pcb工艺
小宇的天下11 天前
Calibre 物理验证工具
pcb工艺
线束线缆组件品替网11 天前
TE Linx RF 物联网射频模块的 RF 线缆连接设计思路
数码相机·物联网·测试工具·电脑·音视频·pcb工艺
可可南木12 天前
ICT测试日志 --2--解释日志记录
功能测试·测试工具·pcb工艺
三佛科技-1341638421212 天前
智能逗狗神器方案开发,狗狗跳跳球MCU方案设计
单片机·嵌入式硬件·智能家居·pcb工艺
可可南木12 天前
ICT测试日志 --1--数据结构
功能测试·测试工具·pcb工艺