我来为您绘制一个更加清晰、图文并茂的ARM SMMU v3组件关系图：
ARM SMMU v3 组件关系详解图
1. 整体架构层次图
Physical Hardware Hardware Layer ARM SMMU v3 Driver Layer IOMMU Core Layer Application Layer SMMU Hardware Stream Table Command Queue Event Queue Page Tables arm_smmu_device arm_smmu_master arm_smmu_domain pgtbl_ops iommu_group iommu_domain iommu_ops 设备驱动 应用程序
2. 详细数据结构关系图
Stream Table Management Domain & Page Table Management ARM SMMU Device Management Device & Group Management STE entries SID to STE mapping CD/VTTBR pointers pgtbl_ops s1_cfg s2_cfg arm_lpae_map arm_lpae_unmap arm_lpae_iova_to_phys struct arm_smmu_master struct arm_smmu_device struct arm_smmu_domain strtab_cfg cmdq evtq asid_map vmid_map struct iommu_group struct device struct group_device default_domain current_domain PCI Device Network Device Storage Device
3. 初始化流程时序图
应用程序 Device iommu_group arm_smmu_device arm_smmu_master arm_smmu_domain iommu_ops pgtbl_ops Hardware 设备探测 iommu_group_get_for_dev() arm_smmu_add_device() 创建master结构 分配SID，配置STE arm_smmu_attach_dev() arm_smmu_domain_finalise() alloc_io_pgtable_ops() 赋值pgtbl_ops 配置页表基地址 设置TTBR/VTTBR 配置完成 绑定成功 设备就绪 初始化完成 设备可用 应用程序 Device iommu_group arm_smmu_device arm_smmu_master arm_smmu_domain iommu_ops pgtbl_ops Hardware
4. 地址转换详细流程图
Response Page Table Walk Domain Selection Stream Table Lookup DMA Request Yes No DMA Response Device Access Complete Page Table Base IOVA to PA Translation Page Table Levels Physical Address PA STE Valid? Extract CD/VTTBR Fault/Error Domain Configuration Stream Table Base SID Index Calculation STE Entry Access STE Content IOVA Address Device DMA Request Stream ID SID
5. 关键数据结构详细图
5.1 iommu_group 结构
group_device iommu_group device pointer struct group_device name list head devices list struct iommu_group default_domain current_domain mutex notifier
5.2 arm_smmu_device 结构
queues strtab_cfg arm_smmu_device command entries cmdq event entries L1 descriptors strtab pointer L2 tables STE entries base register struct arm_smmu_device features strtab_cfg cmdq evtq asid_map vmid_map ias/oas
5.3 arm_smmu_domain 结构
pgtbl_ops s2_cfg s1_cfg arm_smmu_domain unmap function map function iova_to_phys function VTTBR vmid VTCR ASID cdptr TTBR TCR MAIR smmu pointer struct arm_smmu_domain pgtbl_ops stage s1_cfg s2_cfg devices list
6. 操作函数调用关系图
Address Translation Page Table Operations ARM SMMU Operations IOMMU Core Operations domain->ops->iova_to_phys iommu_iova_to_phys arm_smmu_iova_to_phys pgtbl_ops->iova_to_phys arm_lpae_iova_to_phys domain->ops->map iommu_map arm_smmu_map pgtbl_ops->map arm_lpae_map arm_smmu_attach_dev arm_smmu_domain_finalise alloc_io_pgtable_ops arm_lpae_alloc_pgtable iommu_attach_group iommu_attach_device __iommu_attach_group group->ops->attach_dev
7. 内存布局和硬件映射图
DMA Coherent Memory Hardware Memory Mapping Software Memory Layout Command Queue DMA Allocated Memory Event Queue Context Descriptors Page Tables Stream Table Base SMMU Registers STE Entries CD/VTTBR Registers Page Table Walk strtab_cfg arm_smmu_device STE Array CD/VTTBR pointers Page Tables
8. 关键关系总结表
| 组件 | 文件位置 | 主要功能 | 关键关系 |
|---|---|---|---|
| iommu_group | drivers/iommu/iommu.c |
设备分组管理 | 包含多个device，共享domain |
| arm_smmu_device | drivers/iommu/arm-smmu-v3.c |
SMMU硬件抽象 | 管理多个master，提供硬件接口 |
| arm_smmu_master | drivers/iommu/arm-smmu-v3.c |
设备在SMMU中的表示 | 连接device和domain，管理SID |
| arm_smmu_domain | drivers/iommu/arm-smmu-v3.c |
地址转换域 | 管理页表，连接多个master |
| pgtbl_ops | drivers/iommu/io-pgtable-arm.c |
页表操作实现 | 提供IOVA到PA的转换 |
| iommu_ops | drivers/iommu/arm-smmu-v3.c |
IOMMU操作接口 | 连接核心层和具体实现 |
这个详细的图文并茂的关系图展示了ARM SMMU v3中各个组件之间的复杂关系，从软件层到硬件层的完整数据流和配置关系。