【AI-RAN】在空ubuntu服务器安装环境和生成TV,高达430G文件

Docker 安装

1、第一步

bash 复制代码
# Add Docker's official GPG key:
sudo apt update
sudo apt install ca-certificates curl
sudo install -m 0755 -d /etc/apt/keyrings
sudo curl -fsSL https://download.docker.com/linux/ubuntu/gpg -o /etc/apt/keyrings/docker.asc
sudo chmod a+r /etc/apt/keyrings/docker.asc

# Add the repository to Apt sources:
sudo tee /etc/apt/sources.list.d/docker.sources <<EOF
Types: deb
URIs: https://download.docker.com/linux/ubuntu
Suites: $(. /etc/os-release && echo "${UBUNTU_CODENAME:-$VERSION_CODENAME}")
Components: stable
Architectures: $(dpkg --print-architecture)
Signed-By: /etc/apt/keyrings/docker.asc
EOF

sudo apt update

2、第二步

bash 复制代码
sudo apt install docker-ce docker-ce-cli containerd.io docker-buildx-plugin docker-compose-plugin

安装 NVIDIA Aerial™ CUDA-Accelerated RAN

bash 复制代码
# Clone repository
git clone --recurse-submodules https://github.com/NVIDIA/aerial-cuda-accelerated-ran.git
cd aerial-cuda-accelerated-ran

# Enable git LFS and pull files
sudo apt install git-lfs && git lfs pull

# Start interactive development container
./cuPHY-CP/container/run_aerial.sh

# Inside container: Build SDK
./testBenches/phase4_test_scripts/build_aerial_sdk.sh

调试日志

bash 复制代码
root@vultr:~/aerial-cuda-accelerated-ran# ./cuPHY-CP/container/run_aerial.sh
/root/aerial-cuda-accelerated-ran/cuPHY-CP/container/run_aerial.sh starting...
Start container instance at bash prompt
server_id: 
This system has no GPU, running without --gpus all parameter
Creating soft link for libcuda.so.1 for RU Emulator dependency
Command: sudo ln -s /usr/local/cuda/compat/libcuda.so.1 /usr/lib/$(arch)-linux-gnu/libcuda.so.1 && /bin/bash
TTY detected - running in interactive mode
26-1-cubb: Pulling from nvidia/aerial/aerial-cuda-accelerated-ran
0e7ece72e3b5: Pulling fs layer 
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Digest: sha256:5773d96a2188372cb39e57e85148501836cf397bcebeb80861a30674e0ccaa0c
Status: Downloaded newer image for nvcr.io/nvidia/aerial/aerial-cuda-accelerated-ran:26-1-cubb
nvcr.io/nvidia/aerial/aerial-cuda-accelerated-ran:26-1-cubb

==========
== CUDA ==
==========

CUDA Version 13.1.1

Container image Copyright (c) 2016-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.

This container image and its contents are governed by the NVIDIA Deep Learning Container License.
By pulling and using the container, you accept the terms and conditions of this license:
https://developer.nvidia.com/ngc/nvidia-deep-learning-container-license

A copy of this license is made available in this container at /NGC-DL-CONTAINER-LICENSE for your convenience.

WARNING: The NVIDIA Driver was not detected.  GPU functionality will not be available.
   Use the NVIDIA Container Toolkit to start this container with GPU support; see
   https://docs.nvidia.com/datacenter/cloud-native/ .

fixuid: fixuid should only ever be used on development systems. DO NOT USE IN PRODUCTION
fixuid: runtime UID '0' matches existing user 'root'; not changing UID
fixuid: runtime GID '0' matches existing group 'root'; not changing GID
fixuid: recursively searching path /home/aerial
fixuid: chown /home/aerial
fixuid: chown /home/aerial/.bash_logout
fixuid: chown /home/aerial/.bashrc
fixuid: chown /home/aerial/.local
fixuid: chown /home/aerial/.local/bin
fixuid: chown /home/aerial/.profile
root@c_aerial_root:/opt/nvidia/cuBB# ./testBenches/phase4_test_scripts/build_aerial_sdk.sh
-- Using toolchain /opt/nvidia/cuBB/cuPHY/cmake/toolchains/devkit
-- The content of file: /opt/nvidia/cuBB/aerial-sdk-version is: 26-1-cubb, assigned to AERIAL_SDK_VERSION
CMake Warning at CMakeLists.txt:44 (message):
  Setting CMAKE_BUILD_TYPE to 'Release' as none was specified.


-- Enabled ccache
-- Using ENV{cuBB_SDK} /opt/nvidia/cuBB
-- The C compiler identification is GNU 12.3.0
-- The CXX compiler identification is GNU 12.3.0
-- The ASM compiler identification is GNU
-- Found assembler: /usr/local/gnu/bin/x86_64-linux-gnu-gcc
-- The CUDA compiler identification is NVIDIA 13.1.115
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Check for working C compiler: /usr/local/gnu/bin/x86_64-linux-gnu-gcc - skipped
-- Detecting C compile features
-- Detecting C compile features - done
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Check for working CXX compiler: /usr/local/gnu/bin/x86_64-linux-gnu-g++ - skipped
-- Detecting CXX compile features
-- Detecting CXX compile features - done
-- Detecting CUDA compiler ABI info
-- Detecting CUDA compiler ABI info - done
-- Check for working CUDA compiler: /usr/local/cuda/bin/nvcc - skipped
-- Detecting CUDA compile features
-- Detecting CUDA compile features - done
-- Using GPU architectures 80;90;100;120;121
-- Found CUDAToolkit: /usr/local/cuda/include (found version "13.1.115") 
-- Performing Test CMAKE_HAVE_LIBC_PTHREAD
-- Performing Test CMAKE_HAVE_LIBC_PTHREAD - Success
-- Found Threads: TRUE  
-- cuPHY is using toolchain /opt/nvidia/cuBB/cuPHY/cmake/toolchains/devkit
-- cuPHY using CMAKE_CUDA_ARCHITECTURES=80;90;100;120;121
-- Found HDF5: /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so (found suitable version "1.10.7", minimum required is "1.10") found components: C 
-- Found Doxygen: /usr/bin/doxygen (found version "1.9.1") found components: doxygen dot 
-- Configuring /opt/nvidia/cuBB/build.x86_64/cuPHY/Doxyfile
-- including nvlog
-- mathdx: Found CUTLASS (NvidiaCutlass) dependency: /usr/local/nvidia/mathdx/25.06/external/cutlass/include
-- cufftdx: Found CUTLASS (NvidiaCutlass) dependency: /usr/local/nvidia/mathdx/25.06/external/cutlass/include
-- cufftdx: Found commondx dependency
-- Found cufftdx: (Version: 1.5.1, Include dirs: /usr/local/nvidia/mathdx/25.06/include)
-- mathDx: cuFFTDx found: /usr/local/nvidia/mathdx/25.06/include
-- Found GTest: /usr/local/lib/cmake/GTest/GTestConfig.cmake (found version "1.17.0")  
-- mathdx: Found CUTLASS (NvidiaCutlass) dependency: /usr/local/nvidia/mathdx/25.06/external/cutlass/include
-- cufftdx: Found CUTLASS (NvidiaCutlass) dependency: /usr/local/nvidia/mathdx/25.06/external/cutlass/include
-- cufftdx: Found commondx dependency
-- Found cufftdx: (Version: 1.5.1, Include dirs: /usr/local/nvidia/mathdx/25.06/include)
-- mathDx: cuFFTDx found: /usr/local/nvidia/mathdx/25.06/include
-- Found Python3: /usr/bin/python3.10 (found version "3.10.12") found components: Interpreter Development Development.Module Development.Embed 
-- Performing Test HAS_FLTO
-- Performing Test HAS_FLTO - Success
-- Found pybind11: /usr/include (found version "2.9.1")
-- testBenches is using toolchain /opt/nvidia/cuBB/cuPHY/cmake/toolchains/devkit
-- testBenches is using CMAKE_CUDA_ARCHITECTURES=80;90;100;120;121
-- Found HDF5: /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so;/usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5_cpp.so;/usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so (found version "1.10.7") found components: C CXX 
-- Using toolchain /opt/nvidia/cuBB/cuPHY/cmake/toolchains/devkit
-- cuMAC is using toolchain /opt/nvidia/cuBB/cuPHY/cmake/toolchains/devkit
-- Using GPU architectures 80;90;100;120;121
-- Found HDF5: /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5_cpp.so;/usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so (found version "1.10.7") found components: CXX 
-- cumac_ml is using toolchain /opt/nvidia/cuBB/cuPHY/cmake/toolchains/devkit
-- cumac_ml is using GPU architectures 80;90;100;120;121
-- Using HDF5 CXX target /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5_cpp.so;/usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so.
-- ==========================================
-- nonOpenSourceModules Build Configuration
-- ==========================================
-- Build type: Release
-- C++ standard: 20
-- CUDA toolkit: 13.1.115
-- HDF5 CXX libraries: /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5_cpp.so;/usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so
-- TensorRT libraries: /usr/local/lib/libnvinfer.so, /usr/local/lib/libnvonnxparser.so
-- ==========================================
cuMAC-CP: L2ADAPTER_LIBS=
-- Found PkgConfig: /usr/bin/pkg-config (found version "0.29.2") 
-- Checking for one of the modules 'libdpdk'
-- Checking for one of the modules 'doca-gpunetio'
-- Found CURL: /usr/lib/x86_64-linux-gnu/libcurl.so (found version "7.81.0")  
-- Found OpenSSL: /usr/lib/x86_64-linux-gnu/libcrypto.so (found suitable version "3.0.2", minimum required is "3.0.0") found components: Crypto SSL 
-- Found ZLIB: /usr/local/lib/libz.so (found version "1.3.1.1")  
-- Found httplib: /usr/local/include/httplib.h (found version "0.27.0")
-- Found OpenSSL: /usr/lib/x86_64-linux-gnu/libcrypto.so (found version "3.0.2")  
=========================================================
Build nvipc for [x86_64] CMAKE_BUILD_TYPE=Release
NVIPC_CUDA_ENABLE=ON CUDAToolkit_VERSION=13.1.115
NVIPC_DPDK_ENABLE=OFF DPDK_VERSION=22.11.2510.2.1
NVIPC_DOCA_ENABLE=OFF DOCA_VERSION=3.2.1025
NVIPC_DOCA_GPUNETIO=OFF
NVIPC_GDRCPY_ENABLE=OFF
NVIPC_FMTLOG_ENABLE=ON
=========================================================
-- Found HDF5: /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so (found suitable version "1.10.7", minimum required is "1.10") found components: C 
-- Found libsctp: /usr/lib/x86_64-linux-gnu/libsctp.so
-- including nvipc
-- including oran_utils
-- CMAKE_CURRENT_SOURCE_DIR is /opt/nvidia/cuBB/cuPHY-CP/gt_common_libs/oran_utils
-- including slot_comamnd
-- CMAKE_CURRENT_SOURCE_DIR is /opt/nvidia/cuBB/cuPHY-CP/gt_common_libs/slot_command
-- PROJECT_SOURCE_DIR is /opt/nvidia/cuBB/cuPHY-CP/gt_common_libs/nvIPC/include/
-- including perf_metrics
-- Linking perf_metrics with nvlog target
-- CMAKE_CURRENT_SOURCE_DIR is /opt/nvidia/cuBB/cuPHY-CP/gt_common_libs/perf_metrics
-- Checking for module 'libyang>=2.1.88'
--   Found libyang, version 3.13.5
-- LIBYANG version = 3.13.5
-- LIBYANG dir= /usr/local/lib
-- Checking for module 'libyang-cpp>=1.1.0'
--   Found libyang-cpp, version 4
-- LIBYANG cpp version = 4
-- LIBYANG cpp dir= /usr/local/lib
-- Using system protoc: /usr/local/bin/protoc
-- Using system grpc_cpp_plugin: /usr/local/bin/grpc_cpp_plugin
-- Using system grpc_python_plugin: /usr/local/bin/grpc_python_plugin
-- RU building with REPO
-- Setting CUBB_HOME to /opt/nvidia/cuBB
-- DOCA_PATH cmake variable is seen from aeril-fh-drive cmake file doca include dirs Includes: /opt/mellanox/doca/include;/usr/include/libnl3, Lib Dirs: /opt/mellanox/doca/lib/x86_64-linux-gnu Libs:doca_gpunetio Cuda Driver Lib: Cuda RT Lib:
-- DOCA GPU communication enabled
-- Setting CUBB_HOME to /opt/nvidia/cuBB
-- FH Gen Cmake DOCA Lib Dirs: /opt/mellanox/doca/lib/x86_64-linux-gnu
-- CUDA_LIBRARIES is 
-- CUDA_INCLUDE_DIRS is 
-- Setting CUBB_HOME to /opt/nvidia/cuBB
-- Found libdw: /usr/lib/x86_64-linux-gnu/libdw.so  
-- Found libbfd: /usr/lib/x86_64-linux-gnu/libbfd.so  
-- Found libdwarf: /usr/lib/x86_64-linux-gnu/libdwarf.so  
-- Found Backward: /usr/local/lib/backward  
-- Cuphydriver Cmake DOCA Lib Dirs: /opt/mellanox/doca/lib/x86_64-linux-gnu
-- Found nlohmann_json: /usr/lib/cmake/nlohmann_json/nlohmann_jsonConfig.cmake (found version "3.10.5") 
-- Configuring E3 Agent ZMQ dependencies
-- Using ZMQ include: /usr/include
-- Using ZMQ library: zmq
-- including comp_decomp_lib
-- CMAKE_CURRENT_SOURCE_DIR is /opt/nvidia/cuBB/cuPHY-CP/compression_decompression/comp_decomp_lib
-- including comp_decomp_examples
-- Found HDF5: /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so;/usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5_cpp.so;/usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so (found suitable version "1.10.7", minimum required is "1.10") found components: C CXX 
-- TESTMAC: SOURCES=main.cpp;launch_pattern.cpp;test_mac_configs.cpp;test_mac.cpp;fapi_handler.cpp;fapi_validate.cpp;signal_handler.cpp;dummy.cu;cumac_pattern.cpp;cumac_handler.cpp;cumac_configs.cpp;cumac_validate.cpp;scf_fapi_handler.cpp
-- TESTMAC: L2ADAPTER_LIBS=scf_5g_fapi
-- Checking for module 'yaml-0.1'
--   Found yaml-0.1, version 0.2.5
-- tests includes order kernel test bench
-- Setting CUBB_HOME to /opt/nvidia/cuBB
-- Found HDF5: /usr/lib/x86_64-linux-gnu/hdf5/serial/libhdf5.so;/usr/local/lib/libcrypto.so;/usr/lib/x86_64-linux-gnu/libcurl.so;/usr/lib/x86_64-linux-gnu/libpthread.a;/usr/lib/x86_64-linux-gnu/libsz.so;/usr/local/lib/libz.so;/usr/lib/x86_64-linux-gnu/libdl.a;/usr/lib/x86_64-linux-gnu/libm.so (found suitable version "1.10.7", minimum required is "1.10") found components: C 
-- Order Kernel test bench Cmake DOCA Lib Dirs: /opt/mellanox/doca/lib/x86_64-linux-gnu
-- Order Kernel test bench include: /opt/nvidia/cuBB/cuPHY-CP/scfl2adapter/lib/scf_5g_fapi
-- Order Kernel test bench include: /opt/nvidia/cuBB/cuPHY-CP/cuphydriver/include
-- tests includes DL C test bench
-- Setting CUBB_HOME to /opt/nvidia/cuBB
-- Configuring done (4.0s)
-- Generating done (0.3s)
-- Build files have been written to: /opt/nvidia/cuBB/build.x86_64
taskset: failed to parse CPU list: 
[46/1075] Generating LUTs for CRC and Descrambling
Generate look-up tables for 3GPP NR CRC and descrambling: 
/opt/nvidia/cuBB/build.x86_64/cuPHY/src/cuphy/LUTS
Opening '/opt/nvidia/cuBB/build.x86_64/cuPHY/src/cuphy/LUTS/G_CRC_16_P_LUT.h' for writing...
Opening '/opt/nvidia/cuBB/build.x86_64/cuPHY/src/cuphy/LUTS/G_CRC_24_A_P_LUT.h' for writing...
Opening '/opt/nvidia/cuBB/build.x86_64/cuPHY/src/cuphy/LUTS/G_CRC_24_B_P_LUT.h' for writing...
Opening '/opt/nvidia/cuBB/build.x86_64/cuPHY/src/cuphy/LUTS/GOLD_1_SEQ_LUT.h' for writing...
Opening '/opt/nvidia/cuBB/build.x86_64/cuPHY/src/cuphy/LUTS/GOLD_2_32_P_LUT.h' for writing...
[47/1075] Generating LUTs for PUCCH receiver Format 1
Generate look-up tables for PUCCH Receiver - Format 1
/opt/nvidia/cuBB/build.x86_64/cuPHY/src/cuphy/LUTS
[1073/1075] Linking CXX shared module pyaerial/_pycuphy.cpython-310-x86_64-linux-gnu.so
lto-wrapper: warning: using serial compilation of 26 LTRANS jobs
lto-wrapper: note: see the '-flto' option documentation for more information
Cleaning up pyaerial output directory
[1075/1075] Linking CXX executable cuPHY/test/dl_rate_matching/testDlRateMatching
Build completed successfully.

安装 matlab 环境

bash 复制代码
sudo apt update && sudo apt install -y unzip
wget https://ssd.mathworks.com/supportfiles/downloads/R2023a/Release/1/deployment_files/installer/complete/glnxa64/MATLAB_Runtime_R2023a_Update_1_glnxa64.zip
mkdir unzip && cd unzip
unzip ../MATLAB_Runtime_R2023a_Update_1_glnxa64.zip
sudo ./install -mode silent -agreeToLicense yes
cd .. && rm -rf MATLAB_Runtime_R2023a_Update_1_glnxa64.zip unzip

sudo apt install -y libxcomposite1 libnss3 libxrandr-dev libatk1.0-0 libatk-bridge2.0-0 libx11-xcb-dev libxcb-dri3-0 libxcursor-dev libxdamage-dev libxi-dev libdrm-dev libgbm-dev libasound-dev libcups2-dev libxtst-dev

生成的log日志

生成 TV 文件

bash 复制代码
cd ${cuBB_SDK}
sudo -H pip install 5GModel/aerial_mcore/aerial_pkg/dist/aerial_mcore-*.whl
cd ${cuBB_SDK}/5GModel/aerial_mcore/examples
source ../scripts/setup.sh
../scripts/gen_e2e_ota_tvs.sh
ls -lh GPU_test_input/
cp GPU_test_input/* ${cuBB_SDK}/testVectors/

/opt/nvidia/cuBB/testVectors 可以找到。

生成所有的TV 文件

注意:

1、运行安装python的模块,可以进行生成。

bash 复制代码
cd ${cuBB_SDK}
sudo -H pip install 5GModel/aerial_mcore/aerial_pkg/dist/aerial_mcore-*.whl
cd ${cuBB_SDK}/5GModel/aerial_mcore/examples
source ../scripts/setup.sh
export REGRESSION_MODE=1
time python3 ./example_5GModel_regression.py allChannels
echo $?
ls -alF GPU_test_input/
du -h GPU_test_input/


实际测试结果

bash 复制代码
Test PUSCH data detection performance:

TC#    Nframe      FRC            Chan       rxAnt  SNR  SNRoffset  CFO   delay   nCB  errCB   CBer   nTB  errTB   TBer Csi1Ber Csi2Ber cfoErr toErr sinrErr postSinrErr
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
7016     1    G-FR1-A3-10  TDLB100-400-Low     2   -2.1      0.0    200    0.0     20      1  0.050    10     1   0.100   0.000   0.000  129    0.30  0.97     1.33
7001     1    G-FR1-A3-14  TDLB100-400-Low     2   -2.8      0.0    200    0.0     80      0  0.000    20     0   0.000   0.000   0.000   72    0.13  0.64     0.98
7002     1    G-FR1-A4-14  TDLC300-100-Low     2   10.2      0.0    200    0.0    240      1  0.004    20     1   0.050   0.000   0.000   18    0.17  1.56     1.39
7004     1    G-FR1-A3-14  TDLB100-400-Low     4   -5.8      0.0    200    0.0     80      1  0.013    20     1   0.050   0.000   0.000   46    0.12  0.96     1.46
7005     1    G-FR1-A4-14  TDLC300-100-Low     4    6.5      0.0    200    0.0    240      0  0.000    20     0   0.000   0.000   0.000   16    0.18  0.86     0.78
7003     1    G-FR1-A5-14    TDLA30-10-Low     2   13.0      0.0    200    0.0    320      0  0.000    20     0   0.000   0.000   0.000    1    0.07  0.65     1.14
7010     1    G-FR1-A3-28  TDLB100-400-Low     2    1.4      0.0    200    0.0    160      1  0.006    20     1   0.050   0.000   0.000   47    0.12  2.55     3.47
7006     1    G-FR1-A5-14    TDLA30-10-Low     4    9.0      0.0    200    0.0    320      0  0.000    20     0   0.000   0.000   0.000    2    0.07  0.72     0.55
7007     1    G-FR1-A3-14  TDLB100-400-Low     8   -8.7      0.0    200    0.0     80      0  0.000    20     0   0.000   0.000   0.000   20    0.13  1.72     2.25
7017     1    G-FR1-A4-10  TDLC300-100-Low     2   10.0      0.0    200    0.0     50      5  0.100    10     1   0.100   0.000   0.000   17    0.35  1.64     1.69
7008     1    G-FR1-A4-14  TDLC300-100-Low     8    3.2      0.0    200    0.0    240      0  0.000    20     0   0.000   0.000   0.000    7    0.17  0.44     0.88
7012     1    G-FR1-A3-28  TDLB100-400-Low     4   -2.2      0.0    200    0.0    160      0  0.000    20     0   0.000   0.000   0.000   20    0.12  1.86     2.03
7011     1    G-FR1-A4-28  TDLC300-100-Low     2   19.2      0.0    200    0.0    480      2  0.004    20     2   0.100   0.000   0.000   15    0.18  5.91     8.66
7022     1    G-FR1-A3-10  TDLB100-400-Low     8   -8.5      0.0    200    0.0     20      0  0.000    10     0   0.000   0.000   0.000   75    0.33  1.04     1.57
7018     1    G-FR1-A5-10    TDLA30-10-Low     2   12.4      0.0    200    0.0     60     10  0.167    10     2   0.200   0.000   0.000    5    0.26  2.57     2.05
7009     1    G-FR1-A5-14    TDLA30-10-Low     8    5.8      0.0    200    0.0    320      0  0.000    20     0   0.000   0.000   0.000    2    0.07  1.36     1.90
7027     1    G-FR1-A3-24  TDLB100-400-Low     4   -1.8      0.0    200    0.0     40      0  0.000    10     0   0.000   0.000   0.000   76    0.31  2.57     2.77
7013     1    G-FR1-A4-28  TDLC300-100-Low     4   11.6      0.0    200    0.0    480      0  0.000    20     0   0.000   0.000   0.000    6    0.17  3.18     3.76
7019     1    G-FR1-A3-10  TDLB100-400-Low     4   -5.5      0.0    200    0.0     20      1  0.050    10     1   0.100   0.000   0.000   56    0.31  0.61     0.73
7023     1    G-FR1-A4-10  TDLC300-100-Low     8    3.0      0.0    200    0.0     50      0  0.000    10     0   0.000   0.000   0.000    7    0.34  0.50     0.91
7014     1    G-FR1-A3-28  TDLB100-400-Low     8   -5.2      0.0    200    0.0    160      0  0.000    20     0   0.000   0.000   0.000   16    0.13  1.38     1.23
7020     1    G-FR1-A4-10  TDLC300-100-Low     4    6.2      0.0    200    0.0     50      3  0.060    10     2   0.200   0.000   0.000   18    0.36  0.99     0.80
7028     1    G-FR1-A4-24  TDLC300-100-Low     4   11.1      0.0    200    0.0    100      0  0.000    10     0   0.000   0.000   0.000    7    0.34  2.82     3.50
7021     1    G-FR1-A5-10    TDLA30-10-Low     4    8.6      0.0    200    0.0     60      3  0.050    10     2   0.200   0.000   0.000    1    0.25  1.22     0.67
7024     1    G-FR1-A5-10    TDLA30-10-Low     8    5.5      0.0    200    0.0     60      0  0.000    10     0   0.000   0.000   0.000    3    0.25  1.29     1.82
7025     1    G-FR1-A3-24  TDLB100-400-Low     2    2.1      0.0    200    0.0     40      1  0.025    10     1   0.100   0.000   0.000   43    0.32  3.81     4.88
7015     1    G-FR1-A4-28  TDLC300-100-Low     8    7.1      0.0    200    0.0    480      0  0.000    20     0   0.000   0.000   0.000    5    0.18  3.14     3.08
7029     1    G-FR1-A3-24  TDLB100-400-Low     8   -5.3      0.0    200    0.0     40      0  0.000    10     0   0.000   0.000   0.000   53    0.30  1.83     1.63
7026     1    G-FR1-A4-24  TDLC300-100-Low     2   18.3      0.0    200    0.0    100      6  0.060    10     3   0.300   0.000   0.000   17    0.36  4.59     7.31
7030     1    G-FR1-A4-24  TDLC300-100-Low     8    6.9      0.0    200    0.0    100      0  0.000    10     0   0.000   0.000   0.000    2    0.35  3.16     3.02
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total TC = 30, PASS = 30, FAIL = 0


Test PUSCH UCI detection performance:

TC#    Nframe      FRC            Chan       rxAnt  SNR  SNRoffset  CFO   delay   nCB  errCB   CBer   nTB  errTB   TBer Csi1Ber Csi2Ber cfoErr toErr sinrErr postSinrErr
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
7051     1    G-FR1-A4-11  TDLC300-100-Low     2    5.4      0.0    200    0.0     40     40  1.000    20    20   1.000   0.000   0.000   24    0.28  3.58     3.05
7052     1    G-FR1-A4-11  TDLC300-100-Low     2    4.3      0.0    200    0.0     40     40  1.000    20    20   1.000   0.000   0.000   24    0.17  0.79     0.74
7053     1    G-FR1-A4-11  TDLC300-100-Low     2   -0.2      0.0    200    0.0     40     40  1.000    20    20   1.000   0.000   0.000   31    0.16  1.17     1.35
7054     1    G-FR1-A4-11  TDLC300-100-Low     2    2.4      0.0    200    0.0     40     40  1.000    20    20   1.000   0.000   0.000   33    0.19  2.54     2.16
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total TC = 4, PASS = 4, FAIL = 0


Test PUSCH transform precoding detection performance:

TC#    Nframe      FRC            Chan       rxAnt  SNR  SNRoffset  CFO   delay   nCB  errCB   CBer   nTB  errTB   TBer Csi1Ber Csi2Ber cfoErr toErr sinrErr postSinrErr
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
7057     1    G-FR1-A3-32  TDLB100-400-Low     8   -8.4      0.0    200    0.0     20      2  0.100    20     2   0.100   0.000   0.000   34    0.52  1.10     1.53
7055     1    G-FR1-A3-32  TDLB100-400-Low     2   -2.5      0.0    200    0.0     20      3  0.150    20     3   0.150   0.000   0.000  124    0.53  1.26     1.59
7056     1    G-FR1-A3-32  TDLB100-400-Low     4   -5.7      0.0    200    0.0     20      6  0.300    20     6   0.300   0.000   0.000   57    0.54  1.05     1.11
7058     1    G-FR1-A3-31  TDLB100-400-Low     2   -2.4      0.0    200    0.0     10      2  0.200    10     2   0.200   0.000   0.000  176    1.00  1.18     2.26
7059     1    G-FR1-A3-31  TDLB100-400-Low     4   -5.7      0.0    200    0.0     10      5  0.500    10     5   0.500   0.000   0.000   61    1.04  1.52     1.52
7060     1    G-FR1-A3-31  TDLB100-400-Low     8   -8.5      0.0    200    0.0     10      1  0.100    10     1   0.100   0.000   0.000   70    1.02  1.07     1.68
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total TC = 6, PASS = 6, FAIL = 0


Test PUSCH 1e-5 BLER detection performance:

TC#    Nframe      FRC            Chan       rxAnt  SNR  SNRoffset  CFO   delay   nCB  errCB   CBer   nTB  errTB   TBer Csi1Ber Csi2Ber cfoErr toErr sinrErr postSinrErr
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
7101     1    G-FR1-A3A-3             AWGN     2   -5.4      0.0    200    0.0     20      0  0.000    20     0   0.000   0.000   0.000   53    0.03  0.53     1.04
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total TC = 1, PASS = 1, FAIL = 0


Test PUSCH data detection performance:

TC#    Nframe      FRC            Chan       rxAnt  SNR  SNRoffset  CFO   delay   nCB  errCB   CBer   nTB  errTB   TBer Csi1Ber Csi2Ber cfoErr toErr sinrErr postSinrErr
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
7992     1    L1T1M00B024  TDLC300-100-Low     4   -8.5      0.0      0    0.0     20      1  0.050    20     1   0.050   0.000   0.000   11    0.21  1.80     1.52
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total TC = 1, PASS = 1, FAIL = 0


Test mMIMO SRS/BFW/PUSCH performance:

TC#    Nframe      FRC            Chan       rxAnt  SNR  SNRoffset  CFO   delay   nCB  errCB   CBer   nTB  errTB   TBer Csi1Ber Csi2Ber cfoErr toErr sinrErr postSinrErr
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
7701     1    G-FR1-A4-28             AWGN     4   -4.6      0.0      0    0.0    440     10  0.023    20     8   0.400   0.000   0.000    2    0.00  13.14     1.37
7716     1    G-FR1-A4-28      CDLC300-100     4   -6.2      0.0      0    0.0    440     10  0.023    20     4   0.200   0.000   0.000   72    0.15  15.57     0.97
7717     1    G-FR1-A4-14             AWGN     4   -7.6      0.0      0    0.0    440      6  0.014    40     6   0.150   0.000   0.000    3    0.00  16.17     1.64
7732     1    G-FR1-A4-14      CDLC300-100     4   -9.0      0.0      0    0.0    440     56  0.127    40    10   0.250   0.000   0.000   72    0.15  18.40     3.60
7748     1    G-FR1-B4-14      CDLC300-100     4   -5.6      0.0      0    0.0   1440    329  0.228   160    46   0.287   0.000   0.000   45    0.19  9.25     1.72
7733     1    G-FR1-B4-14             AWGN     4   -5.8      0.0      0    0.0   1440     40  0.028   160    38   0.237   0.000   0.000    2    0.00  12.06     3.38
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total TC = 6, PASS = 6, FAIL = 0


Test PRACH false detection rate:

TC#  Nframe mu  cfg root zone  prmb Nant N_PRB     channelType     CFO N_nc   SNR  SNRoffset  total  false  miss
----------------------------------------------------------------------------------------------------------------
5013    1    0  217    0   11    0    2   106               AWGN     0   1  -16.8    0.0        10     0     0
5014    1    0  217    0   11    0    2   106    TDLC300-100-Low   400   1   -8.8    0.0        10     0     0
5015    1    0  217    0   11    0    4   106               AWGN     0   1  -19.0    0.0        10     0     0
5016    1    0  217    0   11    0    4   106    TDLC300-100-Low   400   1  -13.8    0.0        10     0     0
5007    1    1   27   22    1   32    2   273               AWGN     0   1  -14.5    0.0        10     0     0
5001    1    1  217    0   14    0    2   273               AWGN     0   1  -16.5    0.0        10     0     0
5008    1    1   27   22    1   32    2   273    TDLC300-100-Low   400   1   -6.6    0.0        10     0     0
5002    1    1  217    0   14    0    2   273    TDLC300-100-Low   400   1   -9.9    0.0        10     0     0
5003    1    1  217    0   14    0    4   273               AWGN     0   1  -19.0    0.0        10     0     0
5009    1    1   27   22    1   32    4   273               AWGN     0   1  -16.7    0.0        10     0     0
5023    1    0   27   22    1   32    8   106               AWGN     0   1  -18.9    0.0        10     0     0
5017    1    0  217    0   11    0    8   106               AWGN     0   1  -21.2    0.0        10     0     0
5019    1    0   27   22    1   32    2   106               AWGN     0   1  -14.5    0.0        10     0     0
5010    1    1   27   22    1   32    4   273    TDLC300-100-Low   400   1  -11.9    0.0        10     0     0
5004    1    1  217    0   14    0    4   273    TDLC300-100-Low   400   1  -14.5    0.0        10     0     0
5024    1    0   27   22    1   32    8   106    TDLC300-100-Low   400   1  -15.8    0.0        10     0     0
5018    1    0  217    0   11    0    8   106    TDLC300-100-Low   400   1  -17.3    0.0        10     0     0
5020    1    0   27   22    1   32    2   106    TDLC300-100-Low   400   1   -6.6    0.0        10     0     0
5011    1    1   27   22    1   32    8   273               AWGN     0   1  -18.9    0.0        10     0     0
5005    1    1  217    0   14    0    8   273               AWGN     0   1  -21.1    0.0        10     0     0
5022    1    0   27   22    1   32    4   106    TDLC300-100-Low   400   1  -11.9    0.0        10     0     0
5006    1    1  217    0   14    0    8   273    TDLC300-100-Low   400   1  -17.6    0.0        10     0     0
5012    1    1   27   22    1   32    8   273    TDLC300-100-Low   400   1  -15.8    0.0        10     0     0
5021    1    0   27   22    1   32    4   106               AWGN     0   1  -16.7    0.0        10     0     0
----------------------------------------------------------------------------------------------------------------
Total TC = 24, PASS = 24, FAIL = 0

Elapsed time is 7.524163 seconds.

Test PRACH miss detection rate:

TC#  Nframe mu  cfg root zone  prmb Nant N_PRB     channelType     CFO N_nc   SNR  SNRoffset  total  false  miss
----------------------------------------------------------------------------------------------------------------
5013    1    0  217    0   11    0    2   106               AWGN     0   1  -16.8    0.0        10     0     0
5014    1    0  217    0   11    0    2   106    TDLC300-100-Low   400   1   -8.8    0.0        10     0     0
5015    1    0  217    0   11    0    4   106               AWGN     0   1  -19.0    0.0        10     0     0
5016    1    0  217    0   11    0    4   106    TDLC300-100-Low   400   1  -13.8    0.0        10     0     0
5001    1    1  217    0   14    0    2   273               AWGN     0   1  -16.5    0.0        10     0     0
5007    1    1   27   22    1   32    2   273               AWGN     0   1  -14.5    0.0        10     0     0
5002    1    1  217    0   14    0    2   273    TDLC300-100-Low   400   1   -9.9    0.0        10     0     0
5008    1    1   27   22    1   32    2   273    TDLC300-100-Low   400   1   -6.6    0.0        10     0     0
5003    1    1  217    0   14    0    4   273               AWGN     0   1  -19.0    0.0        10     0     0
5019    1    0   27   22    1   32    2   106               AWGN     0   1  -14.5    0.0        10     0     0
5023    1    0   27   22    1   32    8   106               AWGN     0   1  -18.9    0.0        10     0     0
5009    1    1   27   22    1   32    4   273               AWGN     0   1  -16.7    0.0        10     0     0
5018    1    0  217    0   11    0    8   106    TDLC300-100-Low   400   1  -17.3    0.0        10     0     0
5004    1    1  217    0   14    0    4   273    TDLC300-100-Low   400   1  -14.5    0.0        10     0     0
5017    1    0  217    0   11    0    8   106               AWGN     0   1  -21.2    0.0        10     0     0
5010    1    1   27   22    1   32    4   273    TDLC300-100-Low   400   1  -11.9    0.0        10     0     0
5020    1    0   27   22    1   32    2   106    TDLC300-100-Low   400   1   -6.6    0.0        10     0     0
5024    1    0   27   22    1   32    8   106    TDLC300-100-Low   400   1  -15.8    0.0        10     0     0
5005    1    1  217    0   14    0    8   273               AWGN     0   1  -21.1    0.0        10     0     0
5021    1    0   27   22    1   32    4   106               AWGN     0   1  -16.7    0.0        10     0     0
5011    1    1   27   22    1   32    8   273               AWGN     0   1  -18.9    0.0        10     0     0
5006    1    1  217    0   14    0    8   273    TDLC300-100-Low   400   1  -17.6    0.0        10     0     0
5022    1    0   27   22    1   32    4   106    TDLC300-100-Low   400   1  -11.9    0.0        10     0     0
5012    1    1   27   22    1   32    8   273    TDLC300-100-Low   400   1  -15.8    0.0        10     0     0
----------------------------------------------------------------------------------------------------------------
Total TC = 24, PASS = 24, FAIL = 0

Elapsed time is 8.738853 seconds.

Test PUCCH format-0 ACK false detection:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6008     1      0    106   TDLC300-100-Low     2       2     3.3      0.0    200    0.0     500      1   0.0020  0.00  3.30
6007     1      0    106   TDLC300-100-Low     2       1     9.3      0.0    200    0.0     500      2   0.0040  0.00  9.30
6010     1      0    106   TDLC300-100-Low     4       2    -0.8      0.0    200    0.0     500      0   0.0000   NaN  0.80
6009     1      0    106   TDLC300-100-Low     4       1     3.2      0.0    200    0.0     500      0   0.0000  0.00  3.20
6012     1      0    106   TDLC300-100-Low     8       2    -4.0      0.0    200    0.0     500      2   0.0040  0.00  4.00
6011     1      0    106   TDLC300-100-Low     8       1    -1.1      0.0    200    0.0     500      2   0.0040  0.00  1.10
6001     1      1    273   TDLC300-100-Low     2       1     9.2      0.0    200    0.0    1000      1   0.0010  0.00  9.20
6002     1      1    273   TDLC300-100-Low     2       2     3.5      0.0    200    0.0    1000      1   0.0010  0.00  3.50
6004     1      1    273   TDLC300-100-Low     4       2    -0.8      0.0    200    0.0    1000      1   0.0010  0.00  0.80
6003     1      1    273   TDLC300-100-Low     4       1     3.3      0.0    200    0.0    1000      0   0.0000  0.00  3.30
6006     1      1    273   TDLC300-100-Low     8       2    -3.9      0.0    200    0.0    1000      6   0.0060  0.00  3.90
6005     1      1    273   TDLC300-100-Low     8       1    -1.0      0.0    200    0.0    1000      0   0.0000  0.00  1.00
----------------------------------------------------------------------------------------------------------------------------
Total TC = 12, PASS = 12, FAIL = 0

Elapsed time is 7.835137 seconds.

Test PUCCH format-0 NACK to ACK detection:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6008     1      0    106   TDLC300-100-Low     2       2     3.3      0.0    200    0.0     500      0   0.0000  0.00  3.30
6007     1      0    106   TDLC300-100-Low     2       1     9.3      0.0    200    0.0     500      0   0.0000  0.00  9.30
6009     1      0    106   TDLC300-100-Low     4       1     3.2      0.0    200    0.0     500      0   0.0000  0.00  3.20
6010     1      0    106   TDLC300-100-Low     4       2    -0.8      0.0    200    0.0     500      0   0.0000  0.00  0.80
6012     1      0    106   TDLC300-100-Low     8       2    -4.0      0.0    200    0.0     500      0   0.0000  0.00  4.00
6011     1      0    106   TDLC300-100-Low     8       1    -1.1      0.0    200    0.0     500      0   0.0000  0.00  1.10
6001     1      1    273   TDLC300-100-Low     2       1     9.2      0.0    200    0.0    1000      0   0.0000  0.00  9.20
6002     1      1    273   TDLC300-100-Low     2       2     3.5      0.0    200    0.0    1000      0   0.0000  0.00  3.50
6003     1      1    273   TDLC300-100-Low     4       1     3.3      0.0    200    0.0    1000      0   0.0000  0.00  3.30
6004     1      1    273   TDLC300-100-Low     4       2    -0.8      0.0    200    0.0    1000      0   0.0000  0.00  0.80
6005     1      1    273   TDLC300-100-Low     8       1    -1.0      0.0    200    0.0    1000      0   0.0000  0.00  1.00
6006     1      1    273   TDLC300-100-Low     8       2    -3.9      0.0    200    0.0    1000      0   0.0000  0.00  3.90
----------------------------------------------------------------------------------------------------------------------------
Total TC = 12, PASS = 12, FAIL = 0

Elapsed time is 8.194705 seconds.

Test PUCCH format-0 ACK missed detection rate:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6008     1      0    106   TDLC300-100-Low     2       2     3.3      0.0    200    0.0     500      1   0.0020  0.00  3.30
6007     1      0    106   TDLC300-100-Low     2       1     9.3      0.0    200    0.0     500      0   0.0000  0.00  9.30
6009     1      0    106   TDLC300-100-Low     4       1     3.2      0.0    200    0.0     500      0   0.0000  0.00  3.20
6010     1      0    106   TDLC300-100-Low     4       2    -0.8      0.0    200    0.0     500      0   0.0000  0.00  0.80
6011     1      0    106   TDLC300-100-Low     8       1    -1.1      0.0    200    0.0     500      0   0.0000  0.00  1.10
6012     1      0    106   TDLC300-100-Low     8       2    -4.0      0.0    200    0.0     500      0   0.0000  0.00  4.00
6001     1      1    273   TDLC300-100-Low     2       1     9.2      0.0    200    0.0    1000      4   0.0040  0.00  9.20
6002     1      1    273   TDLC300-100-Low     2       2     3.5      0.0    200    0.0    1000      7   0.0070  0.00  3.50
6003     1      1    273   TDLC300-100-Low     4       1     3.3      0.0    200    0.0    1000      1   0.0010  0.00  3.30
6004     1      1    273   TDLC300-100-Low     4       2    -0.8      0.0    200    0.0    1000      4   0.0040  0.00  0.80
6005     1      1    273   TDLC300-100-Low     8       1    -1.0      0.0    200    0.0    1000      5   0.0050  0.00  1.00
6006     1      1    273   TDLC300-100-Low     8       2    -3.9      0.0    200    0.0    1000      1   0.0010  0.00  3.90
----------------------------------------------------------------------------------------------------------------------------
Total TC = 12, PASS = 12, FAIL = 0

Elapsed time is 8.257739 seconds.

Test PUCCH format-1 ACK false detection:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6105     1      0    106   TDLC300-100-Low     4      14    -8.4      0.0    200    0.0    1000      0   0.0000   NaN  41.69
6106     1      0    106   TDLC300-100-Low     8      14   -11.4      0.0    200    0.0    1000      0   0.0000   NaN  39.93
6111     1      0    106   TDLC300-100-Low     4      14    -8.5      0.0    200    0.0    1000      1   0.0010  3.04  41.32
6112     1      0    106   TDLC300-100-Low     8      14   -11.5      0.0    200    0.0    1000      0   0.0000   NaN  39.37
6107     1      1    273   TDLC300-100-Low     2      14    -4.2      0.0    200    0.0    2000      1   0.0005  6.80  43.90
6108     1      1    273   TDLC300-100-Low     4      14    -8.3      0.0    200    0.0    2000      1   0.0005  11.88  41.32
6101     1      1    273   TDLC300-100-Low     2      14    -3.5      0.0    200    0.0    2000      0   0.0000  9.68  46.20
6102     1      1    273   TDLC300-100-Low     4      14    -8.0      0.0    200    0.0    2000      2   0.0010  6.76  40.53
6103     1      1    273   TDLC300-100-Low     8      14   -11.3      0.0    200    0.0    2000      0   0.0000   NaN  38.84
6109     1      1    273   TDLC300-100-Low     8      14   -11.4      0.0    200    0.0    2000      0   0.0000   NaN  37.73
6104     1      0    106   TDLC300-100-Low     2      14    -3.6      0.0    200    0.0    1000      3   0.0030  16.22  45.91
6110     1      0    106   TDLC300-100-Low     2      14    -5.0      0.0    200    0.0    1000      0   0.0000   NaN  44.97
----------------------------------------------------------------------------------------------------------------------------
Total TC = 12, PASS = 12, FAIL = 0

Elapsed time is 8.819213 seconds.

Test PUCCH format-1 NACK to ACK detection:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6105     1      0    106   TDLC300-100-Low     4      14    -8.4      0.0    200    0.0    1000      0   0.0000  5.96  9.55
6106     1      0    106   TDLC300-100-Low     8      14   -11.4      0.0    200    0.0    1000      0   0.0000  6.06  7.58
6101     1      1    273   TDLC300-100-Low     2      14    -3.5      0.0    200    0.0    2000      0   0.0000  1.10  4.40
6102     1      1    273   TDLC300-100-Low     4      14    -8.0      0.0    200    0.0    2000      1   0.0005  2.60  7.23
6103     1      1    273   TDLC300-100-Low     8      14   -11.3      0.0    200    0.0    2000      0   0.0000  2.95  6.96
6104     1      0    106   TDLC300-100-Low     2      14    -3.6      0.0    200    0.0    1000      0   0.0000  2.32  4.02
----------------------------------------------------------------------------------------------------------------------------
Total TC = 6, PASS = 6, FAIL = 0

Elapsed time is 10.687066 seconds.

Test PUCCH format-1 ACK missed detection rate:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6111     1      0    106   TDLC300-100-Low     4      14    -8.5      0.0    200    0.0    1000      0   0.0000  5.73  9.03
6112     1      0    106   TDLC300-100-Low     8      14   -11.5      0.0    200    0.0    1000      0   0.0000  6.26  9.46
6107     1      1    273   TDLC300-100-Low     2      14    -4.2      0.0    200    0.0    2000      0   0.0000  1.31  3.21
6108     1      1    273   TDLC300-100-Low     4      14    -8.3      0.0    200    0.0    2000      0   0.0000  2.54  6.93
6109     1      1    273   TDLC300-100-Low     8      14   -11.4      0.0    200    0.0    2000      0   0.0000  2.71  7.38
6110     1      0    106   TDLC300-100-Low     2      14    -5.0      0.0    200    0.0    1000      2   0.0020  3.38  4.70
----------------------------------------------------------------------------------------------------------------------------
Total TC = 6, PASS = 6, FAIL = 0

Elapsed time is 10.719178 seconds.

Test PUCCH format-2 ACK false detection:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6205     1      0    106   TDLC300-100-Low     4       1     0.3      0.0    200    0.0     200      0   0.0000   NaN  5.86
6201     1      1    273   TDLC300-100-Low     2       1     5.7      0.0    200    0.0     400      0   0.0000   NaN  11.22
6206     1      0    106   TDLC300-100-Low     8       1    -3.5      0.0    200    0.0     200      0   0.0000   NaN  1.95
6202     1      1    273   TDLC300-100-Low     4       1     0.4      0.0    200    0.0     400      0   0.0000   NaN  5.77
6203     1      1    273   TDLC300-100-Low     8       1    -3.3      0.0    200    0.0     400      0   0.0000   NaN  2.12
6204     1      0    106   TDLC300-100-Low     2       1     5.9      0.0    200    0.0     200      1   0.0050  1.03  11.51
----------------------------------------------------------------------------------------------------------------------------
Total TC = 6, PASS = 6, FAIL = 0

Elapsed time is 7.573862 seconds.

Test PUCCH format-2 ACK missed detection rate:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6205     1      0    106   TDLC300-100-Low     4       1     0.3      0.0    200    0.0     200      4   0.0200  1.48  1.93
6201     1      1    273   TDLC300-100-Low     2       1     5.7      0.0    200    0.0     400      0   0.0000  0.40  2.52
6206     1      0    106   TDLC300-100-Low     8       1    -3.5      0.0    200    0.0     200      0   0.0000  1.72  2.10
6202     1      1    273   TDLC300-100-Low     4       1     0.4      0.0    200    0.0     400      0   0.0000  0.75  1.63
6203     1      1    273   TDLC300-100-Low     8       1    -3.3      0.0    200    0.0     400      0   0.0000  1.14  2.01
6204     1      0    106   TDLC300-100-Low     2       1     5.9      0.0    200    0.0     200      0   0.0000  1.14  2.75
----------------------------------------------------------------------------------------------------------------------------
Total TC = 6, PASS = 6, FAIL = 0

Elapsed time is 7.661030 seconds.

Test PUCCH format-2 UCI BLER:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6214     1      0    106   TDLC300-100-Low     2       2     1.2      0.0    200    0.0      50      0   0.0000  1.12  1.74
6215     1      0    106   TDLC300-100-Low     4       2    -3.2      0.0    200    0.0      50      0   0.0000  1.45  2.45
6216     1      0    106   TDLC300-100-Low     8       2    -6.8      0.0    200    0.0      50      1   0.0200  3.53  3.44
6211     1      1    273   TDLC300-100-Low     2       2     0.3      0.0    200    0.0     100      0   0.0000  1.08  1.83
6212     1      1    273   TDLC300-100-Low     4       2    -3.4      0.0    200    0.0     100      0   0.0000  1.43  1.57
6213     1      1    273   TDLC300-100-Low     8       2    -5.9      0.0    200    0.0     100      0   0.0000  1.10  3.25
----------------------------------------------------------------------------------------------------------------------------
Total TC = 6, PASS = 6, FAIL = 0

Elapsed time is 7.898380 seconds.

Test PUCCH format-3 UCI BLER:

TC#  Nframe    mu    PRB         Chan        rxAnt   nSym   SNR   SNRoffset   CFO  delay  total  error    Perr  taErr snrErr
----------------------------------------------------------------------------------------------------------------------------
6317     1      0    106   TDLC300-100-Low     2       4     2.0      0.0    200    0.0      50      0   0.0000  0.67  2.45
6312     1      0    106   TDLC300-100-Low     2      14    -0.1      0.0    200    0.0      50      0   0.0000  0.84  2.20
6313     1      0    106   TDLC300-100-Low     4      14    -3.8      0.0    200    0.0      50      0   0.0000  0.99  3.23
6311     1      0    106   TDLC300-100-Low     2      14     0.3      0.0    200    0.0      50      0   0.0000  0.92  2.34
6318     1      0    106   TDLC300-100-Low     4       4    -2.5      0.0    200    0.0      50      0   0.0000  0.55  2.65
6319     1      0    106   TDLC300-100-Low     8       4    -6.2      0.0    200    0.0      50      0   0.0000  1.09  1.41
6307     1      1    273   TDLC300-100-Low     2       4     1.5      0.0    200    0.0     100      0   0.0000  0.30  1.89
6302     1      1    273   TDLC300-100-Low     2      14     0.1      0.0    200    0.0     100      0   0.0000  0.37  3.39
6301     1      1    273   TDLC300-100-Low     2      14     0.9      0.0    200    0.0     100      0   0.0000  0.41  2.17
6308     1      1    273   TDLC300-100-Low     4       4    -3.0      0.0    200    0.0     100      0   0.0000  0.40  1.34
6303     1      1    273   TDLC300-100-Low     4      14    -3.5      0.0    200    0.0     100      0   0.0000  0.54  2.80
6304     1      1    273   TDLC300-100-Low     4      14    -4.2      0.0    200    0.0     100      0   0.0000  0.51  3.02
6316     1      0    106   TDLC300-100-Low     8      14    -7.7      0.0    200    0.0      50      0   0.0000  1.25  4.44
6309     1      1    273   TDLC300-100-Low     8       4    -6.2      0.0    200    0.0     100      0   0.0000  0.49  2.43
6306     1      1    273   TDLC300-100-Low     8      14    -7.7      0.0    200    0.0     100      0   0.0000  0.67  4.35
6305     1      1    273   TDLC300-100-Low     8      14    -6.8      0.0    200    0.0     100      0   0.0000  0.62  3.95
6314     1      0    106   TDLC300-100-Low     4      14    -4.0      0.0    200    0.0      50      0   0.0000  0.89  3.40
6315     1      0    106   TDLC300-100-Low     8      14    -6.9      0.0    200    0.0      50      0   0.0000  1.21  4.46
----------------------------------------------------------------------------------------------------------------------------
Total TC = 18, PASS = 18, FAIL = 0

Elapsed time is 11.136041 seconds.

Test mMIMO SRS/BFW/PDSCH performance:

TC#    Nframe      FRC            Chan       rxAnt  SNR  SNRoffset  CFO   delay   nCB  errCB   CBer   nTB  errTB   TBer
-----------------------------------------------------------------------------------------------------------------------
3704     1    G-FR1-A4-28        CDLA30-10     4   -5.0      0.0      0    0.0    480      0  0.000    20     0   0.000
3720     1    G-FR1-A4-14        CDLA30-10     4   -4.4      0.0      0    0.0    480      0  0.000    40     0   0.000
3750     1    G-FR1-B4-14             AWGN     4   -1.8      0.0      0    0.0   3200      5  0.002   320     5   0.016
3736     1    G-FR1-B4-14        CDLA30-10     4   -2.6      0.0      0    0.0   1600    420  0.263   160    48   0.300

-----------------------------------------------------------------------------------------------------------------------
Total TC = 4, PASS = 4, FAIL = 0


Channel  Compliance_Test  Error   CUPHY_Test_Vector   FAPI_Test_Vector  Error  Performance_Test   Fail
------------------------------------------------------------------------------
SSB           44            0            49                  49            0           0            0
PDCCH         82            0            95                  95            0           0            0
PDSCH        469            0           493                 493            0           4            0
CSIRS         77            0           103                 103            0           0            0
DLMIX          0            0           1710                 10506            0           0            0
PRACH         71            0            71                  71            0          48            0
PUCCH        543            0           543                 543            0          96            0
PUSCH        648            0           670                 670            0          48            0
SRS          212            0           212                 212            0           0            0
SIMPLEX      100            0           100                 100            0           0            0
ULMIX          0            0           1224                 6503            0           0            0
BFW          162            0           162                 162            0           0            0
------------------------------------------------------------------------------
Total       2408            0          5432                19507            0         196            0

Total time for runRegression is 12733 seconds

real    212m20.483s
user    1523m40.357s
sys     147m48.082s

结果大小

bash 复制代码
430G    GPU_test_input/

服务器配置推荐

128G内存

CPU越多越好

SSD至少 480G🧑‍⚕️

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