CADENCE 切换层显示快捷键

目前切换到cadence的17.4版本LAYOUT,觉得切换层显示的时候需要点击color管理很麻烦,所以写了一个类似于PADS操作习惯的快捷键,不过是针对八层板的,同时因为软件限制,层名必须是TOP;GND02;SIG03;PWR04;PWR05;SIG06;GND07;BOTTOM,如果是其他名字,需要修改下面的代码实现或者将LAYOUT中的层名修改成上述的八层。

ENV文件路径为:

安装盘符:\Cadence\SPB_XX.X\share\pcb\text\env(其中XX.X代表软件版本号,如17.4、22.1等)

替换ENV文件如下:

====================================================

八层板单层显示快捷键 (L1-L8)

层叠:TOP;GND02;SIG03;PWR04;PWR05;SIG06;GND07;BOTTOM

显示内容:ETCH + PIN + VIA CLASS + PLAN + DRC

====================================================

L1 - 第1层 (TOP)

funckey L1 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/TOP" t)(axlVisibleLayer "PIN/TOP" t)(axlVisibleLayer "VIA CLASS/TOP" t)(axlVisibleLayer "PLAN/TOP" t)(axlVisibleLayer "DRC/TOP" t)(axlSetActiveLayer "ETCH/TOP")(axlVisibleUpdate t))'

L2 - 第2层 (GND02)

funckey L2 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/GND02" t)(axlVisibleLayer "PIN/GND02" t)(axlVisibleLayer "VIA CLASS/GND02" t)(axlVisibleLayer "PLAN/GND02" t)(axlVisibleLayer "DRC/GND02" t)(axlSetActiveLayer "ETCH/GND02")(axlVisibleUpdate t))'

L3 - 第3层 (SIG03)

funckey L3 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/SIG03" t)(axlVisibleLayer "PIN/SIG03" t)(axlVisibleLayer "VIA CLASS/SIG03" t)(axlVisibleLayer "PLAN/SIG03" t)(axlVisibleLayer "DRC/SIG03" t)(axlSetActiveLayer "ETCH/SIG03")(axlVisibleUpdate t))'

L4 - 第4层 (PWR04)

funckey L4 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/PWR04" t)(axlVisibleLayer "PIN/PWR04" t)(axlVisibleLayer "VIA CLASS/PWR04" t)(axlVisibleLayer "PLAN/PWR04" t)(axlVisibleLayer "DRC/PWR04" t)(axlSetActiveLayer "ETCH/PWR04")(axlVisibleUpdate t))'

L5 - 第5层 (PWR05)

funckey L5 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/PWR05" t)(axlVisibleLayer "PIN/PWR05" t)(axlVisibleLayer "VIA CLASS/PWR05" t)(axlVisibleLayer "PLAN/PWR05" t)(axlVisibleLayer "DRC/PWR05" t)(axlSetActiveLayer "ETCH/PWR05")(axlVisibleUpdate t))'

L6 - 第6层 (SIG06)

funckey L6 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/SIG06" t)(axlVisibleLayer "PIN/SIG06" t)(axlVisibleLayer "VIA CLASS/SIG06" t)(axlVisibleLayer "PLAN/SIG06" t)(axlVisibleLayer "DRC/SIG06" t)(axlSetActiveLayer "ETCH/SIG06")(axlVisibleUpdate t))'

L7 - 第7层 (GND07)

funckey L7 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/GND07" t)(axlVisibleLayer "PIN/GND07" t)(axlVisibleLayer "VIA CLASS/GND07" t)(axlVisibleLayer "PLAN/GND07" t)(axlVisibleLayer "DRC/GND07" t)(axlSetActiveLayer "ETCH/GND07")(axlVisibleUpdate t))'

L8 - 第8层 (BOTTOM)

funckey L8 '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/BOTTOM" t)(axlVisibleLayer "PIN/BOTTOM" t)(axlVisibleLayer "VIA CLASS/BOTTOM" t)(axlVisibleLayer "PLAN/BOTTOM" t)(axlVisibleLayer "DRC/BOTTOM" t)(axlSetActiveLayer "ETCH/BOTTOM")(axlVisibleUpdate t))'

====================================================

带丝印的顶层和底层

====================================================

funckey LT '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/TOP" t)(axlVisibleLayer "PIN/TOP" t)(axlVisibleLayer "VIA CLASS/TOP" t)(axlVisibleLayer "PLAN/TOP" t)(axlVisibleLayer "DRC/TOP" t)(axlVisibleLayer "BOARD GEOMETRY/SILKSCREEN_TOP" t)(axlVisibleLayer "PACKAGE GEOMETRY/SILKSCREEN_TOP" t)(axlVisibleLayer "REF DES/SILKSCREEN_TOP" t)(axlSetActiveLayer "ETCH/TOP")(axlVisibleUpdate t))'

funckey LB '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/BOTTOM" t)(axlVisibleLayer "PIN/BOTTOM" t)(axlVisibleLayer "VIA CLASS/BOTTOM" t)(axlVisibleLayer "PLAN/BOTTOM" t)(axlVisibleLayer "DRC/BOTTOM" t)(axlVisibleLayer "BOARD GEOMETRY/SILKSCREEN_BOTTOM" t)(axlVisibleLayer "PACKAGE GEOMETRY/SILKSCREEN_BOTTOM" t)(axlVisibleLayer "REF DES/SILKSCREEN_BOTTOM" t)(axlSetActiveLayer "ETCH/BOTTOM")(axlVisibleUpdate t))'

====================================================

带装配的顶层和底层

====================================================

funckey LAT '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/TOP" t)(axlVisibleLayer "PIN/TOP" t)(axlVisibleLayer "VIA CLASS/TOP" t)(axlVisibleLayer "PLAN/TOP" t)(axlVisibleLayer "DRC/TOP" t)(axlVisibleLayer "PACKAGE GEOMETRY/ASSEMBLY_TOP" t)(axlVisibleLayer "REF DES/ASSEMBLY_TOP" t)(axlSetActiveLayer "ETCH/TOP")(axlVisibleUpdate t))'

funckey LAB '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/BOTTOM" t)(axlVisibleLayer "PIN/BOTTOM" t)(axlVisibleLayer "VIA CLASS/BOTTOM" t)(axlVisibleLayer "PLAN/BOTTOM" t)(axlVisibleLayer "DRC/BOTTOM" t)(axlVisibleLayer "PACKAGE GEOMETRY/ASSEMBLY_BOTTOM" t)(axlVisibleLayer "REF DES/ASSEMBLY_BOTTOM" t)(axlSetActiveLayer "ETCH/BOTTOM")(axlVisibleUpdate t))'

====================================================

带丝印+装配的顶层和底层

====================================================

funckey LAST '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/TOP" t)(axlVisibleLayer "PIN/TOP" t)(axlVisibleLayer "VIA CLASS/TOP" t)(axlVisibleLayer "PLAN/TOP" t)(axlVisibleLayer "DRC/TOP" t)(axlVisibleLayer "BOARD GEOMETRY/SILKSCREEN_TOP" t)(axlVisibleLayer "PACKAGE GEOMETRY/SILKSCREEN_TOP" t)(axlVisibleLayer "REF DES/SILKSCREEN_TOP" t)(axlVisibleLayer "PACKAGE GEOMETRY/ASSEMBLY_TOP" t)(axlVisibleLayer "REF DES/ASSEMBLY_TOP" t)(axlSetActiveLayer "ETCH/TOP")(axlVisibleUpdate t))'

funckey LASB '((axlVisibleDesign nil)(axlVisibleLayer "ETCH/BOTTOM" t)(axlVisibleLayer "PIN/BOTTOM" t)(axlVisibleLayer "VIA CLASS/BOTTOM" t)(axlVisibleLayer "PLAN/BOTTOM" t)(axlVisibleLayer "DRC/BOTTOM" t)(axlVisibleLayer "BOARD GEOMETRY/SILKSCREEN_BOTTOM" t)(axlVisibleLayer "PACKAGE GEOMETRY/SILKSCREEN_BOTTOM" t)(axlVisibleLayer "REF DES/SILKSCREEN_BOTTOM" t)(axlVisibleLayer "PACKAGE GEOMETRY/ASSEMBLY_BOTTOM" t)(axlVisibleLayer "REF DES/ASSEMBLY_BOTTOM" t)(axlSetActiveLayer "ETCH/BOTTOM")(axlVisibleUpdate t))'

====================================================

Flip Design (镜像翻转)

====================================================

funckey VB 'flipdesign'

====================================================

辅助功能

====================================================

funckey ZZ '((axlVisibleDesign t)(axlVisibleUpdate t))'

相关推荐
嵌入式老牛2 小时前
阻容降压取电电路设计说明
硬件·电源·阻容
周周记笔记3 小时前
【元器件专题】初识三极管
硬件工程
苏州汇成元电子科技21 小时前
为什么越来越多AI设备开始使用I-PEX 81463-100B-02-D 30Pin极细同轴线束?
人工智能·音视频·硬件工程·信号处理·材料工程
sulikey1 天前
磁盘伺服系统详解:硬盘内部精密的“自动驾驶仪”
磁盘·硬件·固件·伺服系统·磁盘伺服系统
国产芯片设计2 天前
【LCD驱动实战】单颗YL1621脚位不足?双芯片联动驱动方案详解
stm32·单片机·mcu·51单片机·硬件工程
苏州汇成元电子科技2 天前
从I-PEX 82441-100B-02-D看14Pin极细同轴线束怎么选?
音视频·硬件工程·信号处理·材料工程
祝大家百事可乐3 天前
能源危机背景下浅谈如何降低电气设备生产制造成本_Continuously Updated
硬件工程
硬件狂人3 天前
PLL(五)模拟PLL与数字PLL(DPLL)的核心区别详解
硬件工程
llilian_164 天前
失真度测量仪校准 精准可靠的失真度校准检定测试仪筑牢检测根基 失真度检定装置
功能测试·单片机·嵌入式硬件·硬件工程