官方SDK在系统不断电软复位时mcu起不来,原因是在配置入口地址前没有去写MCU和总线复位。这里修改一下MCU启动时序。
- 先通过 PMU 将
mcu_rst_dis_cfg置 0(assert PMU 侧复位,系统级复位,高优先级) - 再通过 CRU
SOFTRST_CON5bit10 assert 复位 (CRU逻辑复位,总线复位。) - 配置入口地址(
sip_smc_mcu_config) - 开时钟
- 配置 stcalib
- 先释放 CRU 复位(
SOFTRST_CON5bit10=0) - 最后通过 PMU 将
mcu_rst_dis_cfg置 1(release PMU 侧复位,MCU 开始运行)
下面是uboot(arch/arm/mach-rockchip/rk3506/rk3506.c)改动点:
int fit_standalone_release(char *id, uintptr_t entry_point)
{
/*
* MCU reset is controlled by two independent sources that must both
* be asserted before reconfiguring the entry address:
*
* 1. PMU_INT_MASK_CON[2] mcu_rst_dis_cfg (0xFF90000C):
* 0 = assert MCU reset, 1 = release MCU reset
* On soft-reboot this bit is still 1 (release), so we must
* explicitly drive it to 0 first.
*
* 2. CRU SOFTRST_CON5[10] hresetn_m0 (0xFF9A0A14):
* 1 = assert reset, 0 = release reset (standard RW with write-mask)
*
* Sequence: assert both resets → configure entry → enable clocks →
* release CRU reset → release PMU reset (MCU starts here).
*/
/* Assert PMU MCU reset (mcu_rst_dis_cfg=0, write-mask bit2=1) */
writel(0x00040000, PMU_BASE + PMU_INT_MASK_CON);
/* Assert CRU bus M0 reset (hresetn_m0=1, write-mask bit10=1) */
writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON5);
udelay(10);
/* Configure MCU address map: map 0 to entry_point via ATF */
sip_smc_mcu_config(ROCKCHIP_SIP_CONFIG_BUSMCU_0_ID,
ROCKCHIP_SIP_CONFIG_MCU_CODE_START_ADDR,
entry_point);
/* Enable bus M0 clocks: swclktck_m0 (bit11=0) and hclk_m0 (bit10=0) */
writel(0x0c000000, CRU_BASE + CRU_GATE_CON5);
writel(0xe0000000, CRU_BASE + CRU_GATE_CON6);
/* Set M0 system time calibration (GRF_SOC_CON36 grf_con_m0_stalib) */
writel(0xbcd3d80, 0xff288090);
/* Release CRU bus M0 reset (hresetn_m0=0, write-mask bit10=1) */
writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON5);
udelay(10);
/*
* Release PMU MCU reset and unmask MCU global interrupt
* (mcu_rst_dis_cfg=1, glb_int_mask_mcu=0, write-mask bits 2:1=1)
* MCU begins execution from entry_point after this write.
*/
writel(0x00060004, PMU_BASE + PMU_INT_MASK_CON);
return 0;
}