JL5110C,10口百兆交换机芯片 2*MAC 1 MII/RMII +1 RMII

Overview The JL5110 is an 8-port fast ethernet switch with 1 MII/ RMII interface and 1 RMII interface. It supports the QoS functions with four-level priority queues that ensure the performance of some real-time network applications.

The JL5110 integrates a 2K-entry address lookup table and a 4-way associative hash algorithm that validates input values, avoids hash collisions, and maintains forwarding performance. The supported maximum length of a data packet is 4097 bytes. With three types of independent storm filters, the JL5110 can filter packet storms. The JL5110 also integrates an intelligent switch engine that solves the Head-ofLine blocking problems.

The JL5110 supports 16 VLAN groups that can be configured as port-based VLANs and/or 802.1Q tagbased VLANs.

Typical Applications

• 10-Port Switch (10BASE-T and 100BASE-TX)

• HomePNA/HomePlug bridge

• Set-Top Box/TV

• Up to 8x10BASE-T/100BASE-TX Ethernet ports + 1 MII/RMII port and 1 RMII port

• Non-blocking wire-speed reception and transmission and non-HOL forwarding

• L2 switching with 2K entry L2 Mac table, hash-based 4-way, 16 entry hash collision CAM, and 64 entry L2 multicast table

• Jumbo frame support, up to 4097 bytes

• 728K bits packet buffer and supports full mesh test from 64B to 1518B

• MIBs cover TX/RX packet/bytes counter, UC/MC/ Flood packet/bytes counter, packet CRC error counter, and drop counter

• Supports high-performance QoS function on each port

• Supports Queue Management Operations

• 16 entry VLAN groups

• Flexible 802.1Q port/tag-based VLAN

• 16 VLANs are selected from a "cam-type-matching"

• Supports hardware loop detection function with LEDs and buzzer to indicate the existence of a loop

• Flexible LED indicators

• Supports Ingress/Egress port mirror

• Multicast/Broadcast storm control with separate token buckets for flooding, broadcast, and multicast packets

• Multicast/Broadcast storm control is either packet or byte-based, configurable per egress port

• 32 entry L2 classification table for advanced application

• STP: supports BPDU and LLDP parsing. Supports port status (forarding, listening, blocking assignment by SW)

• Physical layer port Polarity Detection and Correction function

• Single 3.3V power input can be transformed by integrating LDO regulator to generate 0.9V from 3.3V via a low-cost external Diode

• 25 MHz crystal or 3.3V OSC input

• 88-pin QFN package for 10-port FE Switch

相关推荐
現実君11 分钟前
关于MCU下位替换FPGA的经验与方案
单片机·嵌入式硬件·fpga开发
治愈系贝壳1 小时前
ARM --- day 6 时钟
linux·arm开发·学习
想学好C++的oMen2 小时前
socket编程UDP
网络协议·udp
Terasic友晶科技3 小时前
【教程】Agilex 5 SoC 的两种启动模式的开发演示(一)(FPGA Configuration First)
fpga开发·agilex 5 soc
ALINX技术博客3 小时前
【黑金云课堂】FPGA技术教程Vitis开发:SD卡WAV文件读取音频播放实验
fpga开发·音视频
hai3152475433 小时前
芯片设计的空间框架:以电流步距与相位为核心
硬件架构·硬件工程·材料工程
aixingkong9213 小时前
Atlas 950 1024卡SuperPoD推测分析
网络·人工智能·硬件架构·硬件工程
GitLqr12 小时前
玩转 WebSocket:从原理到 Flutter 实战
websocket·网络协议·flutter
微硬创新15 小时前
耐达讯自动化 CC-Link IE 转 PROFINET网关在污水厂智能化升级实战
人工智能·物联网·网络协议·自动化·信息与通信
晏宁科技YaningAI15 小时前
VoIP系统的工程实现模型:从信令控制到媒体传输的完整架构解析
网络·人工智能·架构·系统架构·信息与通信